Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment.  This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The values of ISA_DMA_THRESHOLD and MAX_DMA_ADDRESS are related; one is
the physical/bus address, the other is the virtual address.  Both need
to be kept in step, so rather than having platforms define both, allow
them to define a single macro which sets both of these macros
appropraitely.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit 6845664a(arm: Cleanup the irq namespace) introduces a typo
causing a build failure for the versatile platform.

[ tglx: Sorry, my bad. Have no idea how I fatfingered that ]
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
LKML-Reference: <20110330060229.27397.7628.stgit@ponder>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Reorder 
irq_set_chip()
irq_set_chip_data()
irq_set_handler()

to

irq_set_chip()
irq_set_handler()
irq_set_chip_data()

so the next patch can combine irq_set_chip() and irq_set_handler() to
irq_set_chip_and_handler().

Automated conversion with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use the generic version and just keep the arch specific output.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Remove the obsolete desc_handle_irq() helper.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Avoid the whole lazy disable dance in the demux handler by providing a
irq_disable() callback.

Use the proper accessor functions and tidy up gpio_irq_handler()
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Make use of the new functionality which ensures that irq_set_type is
called with the chip masked. Unmask is only done when the interrupt is
not disabled.

Retrieve the trigger type from irq_data in unmask
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

No need to write the flow type. Core code does already.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

1) Core code stores the flow type already
2) Flow type is accessible in irq_data
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Store the enabled mask in the local state, so there is no need to
fiddle in the irq descriptor.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use the proper wrappers and use the flow type in irq_data.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use the proper accessor function instead of fiddling in the status
bits directly.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org

Remove the open coded access to irq_desc which will fail on sparse irq
and use the proper wrappers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The core code handles thees already.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Colin Cross <ccross@android.com>
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org

The conversion missed, that one of the irq functions is called from
the init code. Split it out, so the irq number based call works.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The machine id cleanup missed to remove the checks for now removed
ids.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

commit 9eac6d0a (ARM: Remove dependency of plat-orion GPIO code on mach
directory includes) missed to convert one instance of
DOVE_GPIO_VIRT_BASE and left the orion_gpio_init() in mpp.c

Fix it up.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

That wants to be AT91_SDRAMC0
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This clocksource function needs to be void.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The id removal left this machine check in which breaks the build on
some platforms. Remove it.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

MFD changes in 4ec1b54c ('mfd: mfd_cell is now implicitly available to
mc13xxx drivers') changed the mc13xxx_platform_data struct layout.

At the time all users were changed, but this driver was introduced in
another tree at the same time.  This updates the mc13xxx_platform_data
user, fixing a build error.
Signed-off-by: NAndres Salomon <dilinger@queued.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31 bits of the register being read. It
just so happens that the TX/RX full bits the DCC support code is
testing for are high enough in the register to be put into the
condition codes. On a v6 processor, this "feature" isn't
implemented and thus we have to do the usual read, mask, test
operations to check for TX/RX full. Thus, we can drop the v7
implementation and just use the v6 implementation for both.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch fixes the warning below:

WARNING: arch/arm/kernel/built-in.o(.data+0x27c): Section mismatch in reference from the variable etb_driver to the function .init.text:etb_probe()
The variable etb_driver references
the function __init etb_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: arch/arm/kernel/built-in.o(.data+0x2cc): Section mismatch in reference from the variable etm_driver to the function .init.text:etm_probe()
The variable etm_driver references
the function __init etm_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
Signed-off-by: NMing Lei <tom.leiming@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The PrPMC1100 machine was removed in 2.6.11, but left a reference to machine_is_prpmc1100 in arch/arm/kernel/bios32.c.  6f82f4db removed the machine type, which causes a build failure:

CC      arch/arm/kernel/bios32.o
arch/arm/kernel/bios32.c: In function 'pci_fixup_prpmc1100':
arch/arm/kernel/bios32.c:174: error: implicit declaration of function 'machine_is_prpmc1100'

Remove the unused pci_fixup_prpcm1100.
Signed-off-by: NColin Cross <ccross@android.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Rn value from the emulation is unconditionally written back;
this is fine as long as Rn != PC because in that case, even if the
instruction isn't a write back instruction, it will only result in the
same value being written back.

In case Rn == PC, then the emulated instruction doesn't have the
actual PC value in Rn but an adjusted value; when this is written
back, it will result in the PC being incorrectly updated.

An altenative solution would be to check bits 24 and 22 to see whether
the instruction actually is a write back instruction or not. I think
it's enough to check whether Rn != PC,  because:
- it's looks cheaper than the alternative
- to my understaning it's not permitted to update the PC with a write
back instruction, so we don't lose any ability to emulate legal
instructions.
- in case of writing back for non write back instructions where Rn != PC, it doesn't matter because the values are the same.

Regarding the second point above, it would possibly be prudent to add
some checking to prep_emulate_ldr_str(), so that instructions with
both write back and Rn == PC would be rejected.
Signed-off-by: NViktor Rosendahl <viktor.rosendahl@nokia.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

handle_prio_irq is almost identical with handle_fasteoi_irq. The
subtle differences are

1) The handler checks for IRQ_DISABLED after the device handler has
   been called. In case it's set it masks the interrupt.

2) When the handler sees IRQ_DISABLED on entry it masks the interupt
   in the same way as handle_fastoei_irq, but does not set the
   IRQ_PENDING flag.

3) Instead of gracefully handling a recursive interrupt it crashes the
   kernel.

#1 is just relevant when a device handler calls disable_irq_nosync()
   and it does not matter whether we mask the interrupt right away or
   not. We handle lazy masking for disable_irq anyway, so there is no
   real reason to have this extra mask in place.

#2 will prevent the resend of a pending interrupt, which can result in
   lost interrupts for edge type interrupts. For level type interrupts
   the resend is a noop in the generic code. According to the
   datasheet all interrupts are level type, so marking them as such
   will result in the exact same behaviour as the private
   handle_prio_irq implementation.

#3 is just stupid. Crashing the kernel instead of handling a problem
   gracefully is just wrong. With the current semantics- all handlers
   run with interrupts disabled - this is even more wrong.

Rename ack to eoi, remove the unused mask_ack, switch to
handle_fasteoi_irq and remove the private function.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
LKML-Reference: <20110202212552.299898447@linutronix.de>

The current mainline codes of ARCH_S5P64X0 and ARCH_S5P6442
can not support suspend to ram. So needs this for preventing
build error on them.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Len Brown <len.brown@intel.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes CPU idmask of S5P64X0 and EXYNOS4210
and its comparison method because just want to use CPU
id for it.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>