- 06 8月, 2015 14 次提交
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由 Vladimir Kondratiev 提交于
In the recent kernel versions, multiple MSI is not well supported. In particular, it is not supported on x86 and ARM architectures. Also, internal interrupt handling logic is simpler and more effective when using single interrupt. Remove support for 3 MSI, convert module parameter "use_msi" from int with range [0,1,3] to boolean. Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
Rx drops may be for 2 reasons: frame is old, or it is duplicate. On the debugfs "stations" entry, provide counters per reorder buffer for total frames processed, drops for these 2 reasons. Also add debug print for dropped frames. Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
When printing error message, provide string describing IE kind. Derive it from IE type This allows removing of error messages printing in callers Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
sort overall IE's handling prepare code (disabled for now) to add IEs for the beacon Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Dedy Lansky 提交于
FW is allowed to generate WMI events that are not handled by this driver. Treat such case as warning instead of error. Signed-off-by: NDedy Lansky <qca_dlansky@qca.qualcomm.com> Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
Check event length; hex dump both Rx and Tx frames Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
Driver report supported TSO (v4 & v6) and IP checksum offload in addition to previously supported features. In data path skbs are checked for non-zero gso_size, and when detected sent to additional function for processing TSO SKBs. Since HW does not fully support TSO, additional effort is required from the driver. Driver partitions the data into mss sized descriptors which are then DMAed to the HW. Signed-off-by: NVladimir Shulman <QCA_shulmanv@QCA.qualcomm.com> Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
When loading with debug_fw flag, do not bail out on unknown chipId Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
Use function wil_fw_error_recovery() instead of inline equivalent code Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
Multiple del_station requests may be sent to the driver by the supplicant when turning down AP. This may overflow mailbox between the FW and ucode Wait till disconnect of one STA completed before sending next command. Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
linux/device.h should be included using <>, not "" since it is not local include Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
In the debugfs, there is "ulong" attribute printing. It is used for bitmap printing, and more appropriate format would be hexadecimal, not decimal. Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
When performing Rx reordering, count skb's dropped per reorder buffer; and print dropped packets count on the "stations" debugfs entry Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Vladimir Kondratiev 提交于
There are 2 versions of boot loader struct: v0 and v1. In the v1, boot loader build version added; as well as RF status. Support both versions. Boot loader structure v1 has RF status; ignore RF error if firmware not going to be loaded; driver can still be used to interact with the HW Signed-off-by: NVladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 30 7月, 2015 4 次提交
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由 Peter Oh 提交于
Initial QCA99X0 support has a known issue with TCP Tx throughput. All other path such as UDP Tx/Rx and TCP Rx meet their expectation (> 900Mbps), but TCP Tx marked as low as 5Mbps when single pair is used on iperf. The root cause is turned out because TSO flag is not initialized properly so that firmware configures TSO in wrong way. TSO flags in msdu extension descriptor is required to be reset to indicate firmware there is no TSO is enabled, otherwise it could act as TSO is enabled which causes huge throughput drop. In fact, it's enough by resetting TSO flags only to prevent the unexpected behavior, but initializing whole msdu ext. descriptor will help to clear uncertainty of firmware could bring on as it constantly updated. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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Add vendor/device id of QCA99X0 V2.0 to pci id table and QCA99X0_HW_2_0_CHIP_ID_REV to ath10k_pci_supp_chips[] for QCA99X0 to get detected by the driver. kvalo: now QCA99X0 family of chipsets is supported by ath10k. Tested client, AP and monitor mode with QCA9990. Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
When max client was set to 512 in qca99x0, there was host memory alloc failure during wmi service ready event handling. This issue got resolved now, increasing max client limit from 256 to 512. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Raja Mani 提交于
Host memory required for firmware is allocated while handling wmi service ready event. Right now, wmi service ready is handled in tasklet context and it calls dma_alloc_coherent() with atomic flag (GFP_ATOMIC) to allocate memory in host needed for firmware. The problem is, dma_alloc_coherent() with GFP_ATOMIC fails in the platform (at least in AP platform) where it has less atomic pool memory (< 2mb). QCA99X0 requires around 2 MB of host memory for one card, having additional QCA99X0 card in the same platform will require similarly amount of memory. So, it's not guaranteed that all the platform will have enough atomic memory pool. Fix this issue, by handling wmi service ready event in workqueue context and calling dma_alloc_coherent() with GFP_KERNEL. mac80211 work queue will not be ready at the time of handling wmi service ready. So, it can't be used to handle wmi service ready. Also, register work gets scheduled during insmod in existing ath10k_wq and waits for wmi service ready to completed. Both workqueue can't be used for this purpose. New auxiliary workqueue is added to handle wmi service ready. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 29 7月, 2015 4 次提交
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由 David Liu 提交于
This patch enables raw Rx/Tx encap mode to support software based crypto engine. This patch introduces a new module param 'cryptmode'. cryptmode: 0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX encapsulation to the firmware. This is the default mode. 1: Use sofware crypto engine globally with raw mode TX/RX encapsulation to the firmware. Known limitation: A-MSDU must be disabled for RAW Tx encap mode to perform well when heavy traffic is applied. Testing: (by Michal Kazior <michal.kazior@tieto.com>) a) Performance Testing cryptmode=1 ap=qca988x sta=killer1525 killer1525 -> qca988x 194.496 mbps [tcp1 ip4] killer1525 -> qca988x 238.309 mbps [tcp5 ip4] killer1525 -> qca988x 266.958 mbps [udp1 ip4] killer1525 -> qca988x 477.468 mbps [udp5 ip4] qca988x -> killer1525 301.378 mbps [tcp1 ip4] qca988x -> killer1525 297.949 mbps [tcp5 ip4] qca988x -> killer1525 331.351 mbps [udp1 ip4] qca988x -> killer1525 371.528 mbps [udp5 ip4] ap=killer1525 sta=qca988x qca988x -> killer1525 331.447 mbps [tcp1 ip4] qca988x -> killer1525 328.783 mbps [tcp5 ip4] qca988x -> killer1525 375.309 mbps [udp1 ip4] qca988x -> killer1525 403.379 mbps [udp5 ip4] killer1525 -> qca988x 203.689 mbps [tcp1 ip4] killer1525 -> qca988x 222.339 mbps [tcp5 ip4] killer1525 -> qca988x 264.199 mbps [udp1 ip4] killer1525 -> qca988x 479.371 mbps [udp5 ip4] Note: - only open network tested for RAW vs nwifi performance comparison - killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps) - used iperf - OTA, devices a few cm apart from each other, no shielding - tcpX/udpX, X - means number of threads used Overview: - relative Tx performance drop is seen but is within reasonable and expected threshold (A-MSDU must be disabled with RAW Tx) b) Connectivity Testing cryptmode=1 ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK Note: - each test takes all possible endpoint pairs and pings - each pair-ping flushes arp table - ip6 is used c) Testbed Topology: 1ap1sta: [ap] ---- [sta] endpoints: ap, sta 1ap1sta2br: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] endpoints: veth0, veth2, br0, br1 note: STA works in 4addr mode, AP has wds_sta=1 1ap1sta2br1vlan: [veth0] [ap] ---- [sta] [veth2] | | | | [veth1] | \ [veth3] \ / \ / [br0] [br1] | | [vlan0_id2] [vlan1_id2] endpoints: vlan0_id2, vlan1_id2 note: STA works in 4addr mode, AP has wds_sta=1 Credits: Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the amsdu issue, contributed a workaround (already squashed into this patch), and contributed the throughput and connectivity tests results. Signed-off-by: NDavid Liu <cfliu.tw@gmail.com> Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Tested-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Qi Zhou 提交于
During tx completion, tx_lock is held for longer than required, preventing efficient refill of htt->pending_tx. Refactor the code so that only MSDU related operations are protected by the lock. Improves downstream performance on a dual-core ARM Freescale LS1024A (f.k.a. Mindspeed Comcerto 2000) AP with a 3x3 client from 495 to 580 Mbps. Other CPU bound multicore systems may also benefit. Signed-off-by: NDenton Gentry <dgentry@google.com> Signed-off-by: NAvery Pennarun <apenwarr@google.com> [mfaltesek@google.com: removed conflicting code for tracking msdu_ids.] Signed-off-by: NMarty Faltesek <mfaltesek@google.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Kevin Darbyshire-Bryant 提交于
When using DFS channels on Ath10k, kernel log has repeated warning message 'failed to process fft: -22' typically under medium/heavy traffic. This patch switches the warnings to driver debug (WMI events) mode only thus reducing log file noise. DFS and spectral scan share underlying HW mechanisms and enabling one (DFS) enables the other (spectral scan) as far as event reporting from firmware to driver is concerned. Spectral scan events take no part in processing of DFS radar pulses which are delivered as distinct events, so the fft (spectral event) warning is harmless and DFS interference detection/protection still occurs. Symptoms seen & fix tested in both debug & non-debug modes on TP-Link Archer C7 v2 platform. Signed-off-by: NKevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Nik Nyby 提交于
This fixes two misspellings of "distribution" in a comment. Signed-off-by: NNik Nyby <nikolas@gnu.org> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 24 7月, 2015 7 次提交
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由 Raja Mani 提交于
HTT_H2T_MSG_TYPE_MGMT_TX msg in 10.4 firmware carries additional 4 byte in htt_mgmt_tx_desc where it tells to firmware that at what rate mgmt frame has to go out in the air. It's an optional parameter, setting this field to zero will force firmware to choose auto rate and send the frame out. Those 4 byte info is missed out in the current code and 10.4 firmware ended up reading some junk in those 4 byte and sometime malfunctioning. Fix it by adding 4 byte in struct htt_mgmt_tx_desc. Non 10.4 firmware will not process those four byte. So, adding 4 byte at the end of struct htt_mgmt_tx_desc will not create any impact on other chipset. Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Manikanta Pubbisetty 提交于
The patch adds support to offload TCP/UDP checksum calculations for QCA99x0. Signed-off-by: NManikanta Pubbisetty <c_mpubbi@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Maninder Singh 提交于
chandef is initialized with NULL and on the very next line, we are using it to get channel, which is not correct. Channel should be initialized after obtaining chandef. Found by cppcheck: ath/ath10k/mac.c:839]: (error) Possible null pointer dereference: chandef Signed-off-by: NManinder Singh <maninder1.s@samsung.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
QCA99X0 chip has an extra 4 bytes in rx_msdu_start, 20 bytes in rx_msdu_end and 20 bytes in rx_ppdu_end structure which are used in htt_rx_desc and HTT Rx ring offset setup. This is necessary for correct Rx for QCA99X0 or Rx descriptors will be overwritten and corrupted. With this patch QCA988X and QCA6174 will have extra 44 bytes padding in Rx descriptor layout which is harmless. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
rx_ppdu_end_common structure is valid for both of qca998x and qca6174, but not for qca99x0 since it has new additional members. Hence update the common structure to cover qca99x0 as well. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Peter Oh 提交于
Since QCA99X0 uses fragmentation descriptor differently from other ones on tx path, we need to handle it separately. QCA99X0 is using 48 bits for address and 16 bits for length out of 2 dword and each values have to be programmed by frag desc base addr + msdu id, so that hardware can retrieve corresponding frag data. Signed-off-by: NPeter Oh <poh@qca.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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It is observed that during cold reset pcie access right after a write operation to SOC_GLOBAL_RESET_ADDRESS causes Data Bus Error and system hard lockup. The reason for bus error is that pcie needs some time to get back to stable state for any transaction during cold reset. Add delay of 20 msecs after write of SOC_GLOBAL_RESET_ADDRESS to fix this issue. This patch is tested on QCA988X. This is also tested on QCA99X0 which is WIP. Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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- 21 7月, 2015 1 次提交
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由 Kalle Valo 提交于
Major changes in ath10k: * enable VHT for IBSS * initial work to support qca99x0 and the corresponding 10.4 firmware branch
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- 12 7月, 2015 10 次提交
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由 Zefir Kurtisi 提交于
FCC long pulse radar (type 5) requires pulses to be checked for chirping. This patch implements chirp detection based on the FFT data provided for long pulses. A chirp is detected when a set of criteria defined by FCC pulse characteristics is met, including * have at least 4 FFT samples * max_bin index moves equidistantly between samples * the gradient is within defined range The chirp detection has been tested with reference radar generating devices and proved to work reliably. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Zefir Kurtisi 提交于
The chip reports radar pulses on extension channel even if operating in HT20 mode. This patch adds a sanity check for HT40 mode before it feeds pulses on extension channel to the pattern detector. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Nicholas Mc Guire 提交于
commit 2c86c275 ("Add ipw2100 wireless driver.") introduced HW_PHY_OFF_LOOP_DELAY (HZ / 5000) which always evaluated to 0. Clarified by Stanislav Yakovlev <stas.yakovlev@gmail.com> that it should be 50 milliseconds thus fixed up to msecs_to_jiffies(50). Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Acked-by: NStanislav Yakovlev <stas.yakovlev@gmail.com> Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
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由 Michal Kazior 提交于
Concurrent AP/GO operation on different channels isn't really supported well by the firmware so it's better to remove it from being advertised. Also tune the way station and p2p client interface limits are expressed to allow station + 2x p2p client or station + p2p client + p2p go. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Whenever any vdev was supposed to be paused all Tx queues were stopped (except offchannel) instead of only these associated with the given vdev. This caused subtle issues with multi-channel/multi-vif scenarios, e.g. authentication of station vif could sometimes fail depending on fw tx pause request timing. Fixes: b4aa539d ("ath10k: implement tx pause wmi event") Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Psmode can be forcefully enabled when vdev isn't started. It isn't guaranteed that mac80211 will re-issue psmode setting after vdev is started unless actual bss_conf.ps value has changed. Even if this doesn't fix any problems now it may prevent future breakage. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
The expiration function must not be called when roc is explicitly cancelled by mac80211. However since fcf98446 ("ath10k: fix hw roc expiration") the notification was never sent when roc actually expired. This fixes some P2P connection setup issues. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
Further testing proved that multi-channel AP+STA on QCA6174 with RM.2.0-00088 should have powersave force-disabled to avoid beacon misses/skipping on either side which in turn could disrupt communication. Since AP never has arvif->ps don't even bother checking it. Other combinations may be broken as well so disallow powersave with multivif outright unless firmware advertises otherwise. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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由 Michal Kazior 提交于
mac80211 already does provide complete IEs for Probe Requests for hw scan and ath10k firmware was appending duplicate Supported Rates IEs unnecessarily. Signed-off-by: NMichal Kazior <michal.kazior@tieto.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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In commit 418ca599 ("ath10k: Make target cpu address to CE address conversion chip specific") mask 0x7fff is added by mistake instead of 0x7ff. Fix this regression. Fixes: 418ca599 ("ath10k: Make target cpu address to CE address conversion chip specific") Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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