1. 19 1月, 2017 1 次提交
    • A
      drm/i915/huc: Add HuC fw loading support · bd132858
      Anusha Srivatsa 提交于
      The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
      is used for both cases.
      
      HuC loading needs to be before GuC loading. The WOPCM setting must
      be done early before loading any of them.
      
      v2: rebased on-top of drm-intel-nightly.
          removed if(HAS_GUC()) before the guc call. (D.Gordon)
          update huc_version number of format.
      v3: rebased to drm-intel-nightly, changed the file name format to
          match the one in the huc package.
          Changed dev->dev_private to to_i915()
      v4: moved function back to where it was.
          change wait_for_atomic to wait_for.
      v5: rebased. Changed the year in the copyright message to reflect
      the right year.Correct the comments,remove the unwanted WARN message,
      replace drm_gem_object_unreference() with i915_gem_object_put().Make the
      prototypes in intel_huc.h non-extern.
      v6: rebased. Update the file construction done by HuC. It is similar to
      GuC.Adopted the approach used in-
      https://patchwork.freedesktop.org/patch/104355/ <Tvrtko Ursulin>
      v7: Change dev to dev_priv in macro definition.
      Corrected comments.
      v8: rebased on top of drm-tip. Updated functions intel_huc_load(),
      intel_huc_init() and intel_uc_fw_fetch() to accept dev_priv instead of
      dev. Moved contents of intel_huc.h to intel_uc.h.
      v9: change SKL_FW_ to SKL_HUC_FW_. Add intel_ prefix to guc_wopcm_size().
      Remove unwanted checks in intel_uc.h. Rename huc_fw in struct intel_huc to
      simply fw to avoid redundency.
      v10: rebased. Correct comments. Make intel_huc_fini() accept dev_priv
      instead of dev like intel_huc_init() and intel_huc_load().Move definition
      to i915_guc_reg.h from intel_uc.h. Clean DMA_CTRL bits after HuC DMA
      transfer in huc_ucode_xfer() instead of guc_ucode_xfer(). Add suitable
      WARNs to give extra info.
      v11: rebased. Add proper bias for HuC and make sure there are
      asserts on failure by using guc_ggtt_offset_vma(). Introduce
      intel_huc.c and remove intel_huc_loader.c since it has functions that
      do more than just loading.Correct year in copyright.
      v12: remove invalidates that are not required anymore.
      
      Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Tested-by: NXiang Haihao <haihao.xiang@intel.com>
      Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com>
      Signed-off-by: NAlex Dai <yu.dai@intel.com>
      Signed-off-by: NPeter Antoine <peter.antoine@intel.com>
      Reviewed-by: NMichal Wajdeczko <michal.wajdeczko@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1484755558-1234-1-git-send-email-anusha.srivatsa@intel.com
      bd132858
  2. 18 1月, 2017 3 次提交
  3. 13 1月, 2017 1 次提交
  4. 12 1月, 2017 1 次提交
  5. 10 1月, 2017 1 次提交
  6. 28 12月, 2016 1 次提交
  7. 02 12月, 2016 3 次提交
  8. 29 11月, 2016 1 次提交
  9. 26 11月, 2016 1 次提交
  10. 23 11月, 2016 1 次提交
  11. 11 11月, 2016 1 次提交
  12. 25 10月, 2016 3 次提交
    • S
      drm/i915: Support for GuC interrupts · 26705e20
      Sagar Arun Kamble 提交于
      There are certain types of interrupts which Host can receive from GuC.
      GuC ukernel sends an interrupt to Host for certain events, like for
      example retrieve/consume the logs generated by ukernel.
      This patch adds support to receive interrupts from GuC but currently
      enables & partially handles only the interrupt sent by GuC ukernel.
      Future patches will add support for handling other interrupt types.
      
      v2:
      - Use common low level routines for PM IER/IIR programming (Chris)
      - Rename interrupt functions to gen9_xxx from gen8_xxx (Chris)
      - Replace disabling of wake ref asserts with rpm get/put (Chris)
      
      v3:
      - Update comments for more clarity. (Tvrtko)
      - Remove the masking of GuC interrupt, which was kept masked till the
        start of bottom half, its not really needed as there is only a
        single instance of work item & wq is ordered. (Tvrtko)
      
      v4:
      - Rebase.
      - Rename guc_events to pm_guc_events so as to be indicative of the
        register/control block it is associated with. (Chris)
      - Add handling for back to back log buffer flush interrupts.
      
      v5:
      - Move the read & clearing of register, containing Guc2Host message
        bits, outside the irq spinlock. (Tvrtko)
      
      v6:
      - Move the log buffer flush interrupt related stuff to the following
        patch so as to do only generic bits in this patch. (Tvrtko)
      - Rebase.
      
      v7:
      - Remove the interrupts_enabled check from gen9_guc_irq_handler, want to
        process that last interrupt also before disabling the interrupt, sync
        against the work queued by irq handler will be done by caller disabling
        the interrupt.
      Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      26705e20
    • A
      drm/i915: New structure to contain GuC logging related fields · d6b40b4b
      Akash Goel 提交于
      So far there were 2 fields related to GuC logs in 'intel_guc' structure.
      For the support of capturing GuC logs & storing them in a local buffer,
      multiple new fields would have to be added. This warrants a separate
      structure to contain the fields related to GuC logging state.
      Added a new structure 'intel_guc_log' and instance of it inside
      'intel_guc' structure.
      
      v2: Rebase.
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      d6b40b4b
    • S
      drm/i915: Decouple GuC log setup from verbosity parameter · b1e37103
      Sagar Arun Kamble 提交于
      GuC Log buffer allocation was tied up with verbosity level module param
      i915.guc_log_level. User would be given a provision to enable firmware
      logging at runtime, through a host2guc action, and not necessarily during
      Driver load time. But the address of log buffer can be passed only in
      init params, at firmware load time, so GuC has to be reset and firmware
      needs to be reloaded to pass the log buffer address at runtime.
      To avoid reset of GuC & reload of firmware, allocation of log buffer will
      be done always but logging would be enabled initially on GuC side based on
      the value of module parameter guc_log_level.
      
      v2: Update commit message to describe the constraint with allocation of
          log buffer at runtime. (Tvrtko)
      
      v3: Rebase.
      Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      b1e37103
  13. 18 10月, 2016 1 次提交
  14. 14 10月, 2016 5 次提交
  15. 27 9月, 2016 1 次提交
  16. 26 9月, 2016 2 次提交
  17. 15 9月, 2016 2 次提交
  18. 05 9月, 2016 1 次提交
  19. 22 8月, 2016 1 次提交
  20. 15 8月, 2016 3 次提交
  21. 11 8月, 2016 1 次提交
  22. 05 8月, 2016 1 次提交
  23. 21 7月, 2016 1 次提交
  24. 20 7月, 2016 1 次提交
  25. 05 7月, 2016 1 次提交
  26. 04 7月, 2016 1 次提交