- 02 7月, 2013 1 次提交
-
-
由 Kevin Hao 提交于
With the patch 7230c564 (powerpc: Rework lazy-interrupt handling), it seems that the coreint works pretty well on the 85xx 64bit kernel. So use the coreint by default for these boards. Signed-off-by: NKevin Hao <haokexin@gmail.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 13 9月, 2012 2 次提交
-
-
由 Jia Hongtao 提交于
We unified the Freescale pci/pcie initialization by changing the fsl_pci to a platform driver. In previous PCI code architecture the initialization routine is called at board_setup_arch stage. Now the initialization is done in probe function which is architectural better. Also It's convenient for adding PM support for PCI controller in later patch. Now we registered pci controllers as platform devices. So we combine two initialization code as one platform driver. Signed-off-by: NJia Hongtao <B38951@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Add support for the Freescale P5040DS Reference Board ("Superhydra"), which is similar to the P5020DS. Features of the P5040 are listed below, but not all of these features (e.g. DPAA networking) are currently supported. Four P5040 single-threaded e5500 cores built Up to 2.4 GHz with 64-bit ISA support Three levels of instruction: user, supervisor, hypervisor CoreNet platform cache (CPC) 2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Up to 1600MT/s Memory pre-fetch engine DPAA incorporating acceleration for the following functions Packet parsing, classification, and distribution (FMAN) Queue management for scheduling, packet sequencing and congestion management (QMAN) Hardware buffer management for buffer allocation and de-allocation (BMAN) Cryptography acceleration (SEC 5.0) at up to 40 Gbps SerDes 20 lanes at up to 5 Gbps Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces Two 10 Gbps Ethernet MACs Ten 1 Gbps Ethernet MACs High-speed peripheral interfaces Two PCI Express 2.0/3.0 controllers Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Two I2C controllers Four UARTs Integrated flash controller supporting NAND and NOR flash DMA Dual four channel Support for hardware virtualization and partitioning enforcement Extra privileged level for hypervisor support QorIQ Trust Architecture 1.1 Secure boot, secure debug, tamper detection, volatile key storage Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
- 29 3月, 2012 1 次提交
-
-
由 David Howells 提交于
Disintegrate asm/system.h for PowerPC. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> cc: linuxppc-dev@lists.ozlabs.org
-
- 27 6月, 2011 3 次提交
-
-
由 Timur Tabi 提交于
The Freescale hypervisor does not allow guests to write to the timebase registers (virtualizing the timebase register was deemed too complicated), so don't try to synchronize the timebase registers when we're running under the hypervisor. This typically happens when kexec support is enabled. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Scott Wood 提交于
e500mc cannot doze or nap due to an erratum (as well as having a different mechanism than previous e500), but it has a "wait" instruction that is similar to doze. On 64-bit, due to the soft-irq-disable mechanism, the existing book3e_idle should be used instead. Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
- 14 10月, 2010 2 次提交
-
-
由 Kumar Gala 提交于
The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kumar Gala 提交于
The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
- 21 11月, 2009 1 次提交
-
-
由 Kumar Gala 提交于
Add basic support for the P4080 DS reference board. None of the data path devices (ethernet, crypto, pme) are support at this time. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-