- 16 10月, 2012 1 次提交
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由 Max Filippov 提交于
- reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NChris Zankel <chris@zankel.net>
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- 03 5月, 2010 1 次提交
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由 Chris Zankel 提交于
Coprocessor.h depends on variant settings. Signed-off-by: NChris Zankel <chris@zankel.net>
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- 07 11月, 2008 1 次提交
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由 Chris Zankel 提交于
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NChris Zankel <chris@zankel.net>
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- 14 2月, 2008 2 次提交
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由 Chris Zankel 提交于
Signed-off-by: NChris Zankel <chris@zankel.net>
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由 Chris Zankel 提交于
The Xtensa architecture allows to define custom instructions and registers. Registers that are bound to a coprocessor are only accessible if the corresponding enable bit is set, which allows to implement a 'lazy' context switch mechanism. Other registers needs to be saved and restore at the time of the context switch or during interrupt handling. This patch adds support for these additional states: - save and restore registers that are used by the compiler upon interrupt entry and exit. - context switch additional registers unbound to any coprocessor - 'lazy' context switch of registers bound to a coprocessor - ptrace interface to provide access to additional registers - update configuration files in include/asm-xtensa/variant-fsf Signed-off-by: NChris Zankel <chris@zankel.net>
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- 01 6月, 2007 1 次提交
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由 Chris Zankel 提交于
The non-rt signal handling was never really used, so we don't break anything. This patch also cleans up the signal stack-frame to make it independent from the processor configuration. It also improves the method used for controlling single-stepping. We now save and restore the 'icountlevel' register that controls single stepping and set or clear the saved state to enable or disable it. Signed-off-by: NChris Zankel <chris@zankel.net>
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- 11 12月, 2006 1 次提交
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由 Chris Zankel 提交于
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 04 10月, 2006 1 次提交
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由 Uwe Zeisberger 提交于
Many files include the filename at the beginning, serveral used a wrong one. Signed-off-by: NUwe Zeisberger <Uwe_Zeisberger@digi.com> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 24 6月, 2005 1 次提交
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由 Chris Zankel 提交于
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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