1. 09 4月, 2013 4 次提交
    • M
      ARM: sunxi: Rework the restart code · bc34b5f2
      Maxime Ripard 提交于
      The Allwinner sun6i (A31) has a slightly different watchdog, that
      doesn't allow to use the already existing restart code.
      
      Rework a bit the restart code to allow to plug in more easily different
      restart handlers depending on the device tree.
      
      In the past, we were also meaning sunxi as a generic name covering all
      Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that
      differs pretty much from sun4i and sun5i, and we will end up having
      sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor
      convenient. So, while we're at it, also change sunxi to sun4i.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      bc34b5f2
    • M
      irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro · f1dc6c4f
      Maxime Ripard 提交于
      This allows to remove some boilerplate code. At the same time, call the
      set_handle_irq function in the initialization function of the irqchip,
      so that we can remove it from the machine declaration.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      f1dc6c4f
    • M
      clocksource: sunxi: Rename sunxi to sun4i · 119fd635
      Maxime Ripard 提交于
      During the introduction of the Allwinner SoC platforms, sunxi was
      initially meant as a generic name for all the variants of the Allwinner
      SoC.
      
      It was ok at the time of the support of only the A10 and A13 that
      looks pretty much the same, but it's beginning to be troublesome with
      the future addition of the Allwinner A31 (sun6i) that is quite
      different, and would introduce some weird logic, where sunxi would
      actually mean in some case sun4i and sun5i but without sun6i...
      
      Moreover, it makes the compatible strings naming scheme not consistent
      with other architectures, where usually for this kind of compability, we
      just use the oldest SoC name that has this IP, so let's do just this.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      119fd635
    • M
      clocksource: sunxi: make use of CLKSRC_OF · ea71d9a6
      Maxime Ripard 提交于
      Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header,
      and instead of using a custom init function in the machine definition
      use the standard clocksource_of_init function.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      ea71d9a6
  2. 27 3月, 2013 1 次提交
  3. 18 3月, 2013 1 次提交
    • L
      perf,x86: fix wrmsr_on_cpu() warning on suspend/resume · 2a6e06b2
      Linus Torvalds 提交于
      Commit 1d9d8639 ("perf,x86: fix kernel crash with PEBS/BTS after
      suspend/resume") fixed a crash when doing PEBS performance profiling
      after resuming, but in using init_debug_store_on_cpu() to restore the
      DS_AREA mtrr it also resulted in a new WARN_ON() triggering.
      
      init_debug_store_on_cpu() uses "wrmsr_on_cpu()", which in turn uses CPU
      cross-calls to do the MSR update.  Which is not really valid at the
      early resume stage, and the warning is quite reasonable.  Now, it all
      happens to _work_, for the simple reason that smp_call_function_single()
      ends up just doing the call directly on the CPU when the CPU number
      matches, but we really should just do the wrmsr() directly instead.
      
      This duplicates the wrmsr() logic, but hopefully we can just remove the
      wrmsr_on_cpu() version eventually.
      Reported-and-tested-by: NParag Warudkar <parag.lkml@gmail.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      2a6e06b2
  4. 16 3月, 2013 1 次提交
  5. 14 3月, 2013 2 次提交
  6. 13 3月, 2013 4 次提交
  7. 12 3月, 2013 5 次提交
    • A
      ARM: spear3xx: Use correct pl080 header file · 27f423fe
      Arnd Bergmann 提交于
      The definitions have move around recently, causing build errors
      in spear3xx for all configurations:
      
      spear3xx.c:47:5: error: 'PL080_BSIZE_16' undeclared here (not in a function)
      spear3xx.c:47:23: error: 'PL080_CONTROL_SB_SIZE_SHIFT' undeclared here (not in a function)
      spear3xx.c:48:22: error: 'PL080_CONTROL_DB_SIZE_SHIFT' undeclared here (not in a function)
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Alessandro Rubini <rubini@gnudd.com>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      27f423fe
    • A
      mfd: ab8500: Kill "reg" property from binding · d52701d3
      Arnd Bergmann 提交于
      The ab8500 device is a child of the prcmu device, which is a memory mapped
      bus device, whose children are addressable using physical memory addresses,
      not using mailboxes, so a mailbox number in the ab8500 node cannot be
      parsed by DT. Nothing uses this number, since it was only introduced
      as part of the failed attempt to clean up prcmu mailbox handling, and
      we can simply remove it.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
      d52701d3
    • P
      Arm: socfpga: pl330: Add #dma-cells for generic dma binding support · 0d8abbfd
      Padmavathi Venna 提交于
      This patch adds #dma-cells property to PL330 DMA controller nodes for
      supporting generic dma dt bindings on SOCFPGA platform. #dma-channels
      and #dma-requests are not required now but added in advance.
      Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      0d8abbfd
    • M
      ARM: multiplatform: Sort the max gpio numbers. · 2a6ad871
      Maxime Ripard 提交于
      When building a multiplatform kernel, we could end up with a smaller
      number of GPIOs than the one required by the platform the kernel was
      running on.
      
      Sort the max GPIO number by descending order so that we always take the
      highest number required.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      2a6ad871
    • I
      xen: arm: mandate EABI and use generic atomic operations. · 85323a99
      Ian Campbell 提交于
      Rob Herring has observed that c81611c4 "xen: event channel arrays are
      xen_ulong_t and not unsigned long" introduced a compile failure when building
      without CONFIG_AEABI:
      
      /tmp/ccJaIZOW.s: Assembler messages:
      /tmp/ccJaIZOW.s:831: Error: even register required -- `ldrexd r5,r6,[r4]'
      
      Will Deacon pointed out that this is because OABI does not require even base
      registers for 64-bit values. We can avoid this by simply using the existing
      atomic64_xchg operation and the same containerof trick as used by the cmpxchg
      macros. However since this code is used on memory which is shared with the
      hypervisor we require proper atomic instructions and cannot use the generic
      atomic64 callbacks (which are based on spinlocks), therefore add a dependency
      on !GENERIC_ATOMIC64. Since we already depend on !CPU_V6 there isn't much
      downside to this.
      
      While thinking about this we also observed that OABI has different struct
      alignment requirements to EABI, which is a problem for hypercall argument
      structs which are shared with the hypervisor and which must be in EABI layout.
      Since I don't expect people to want to run OABI kernels on Xen depend on
      CONFIG_AEABI explicitly too (although it also happens to be enforced by the
      !GENERIC_ATOMIC64 requirement too).
      Signed-off-by: NIan Campbell <ian.campbell@citrix.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Rob Herring <robherring2@gmail.com>
      Acked-by: NStefano Stabellini <Stefano.Stabellini@eu.citrix.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      85323a99
  8. 11 3月, 2013 9 次提交
  9. 09 3月, 2013 12 次提交
  10. 08 3月, 2013 1 次提交