This is required in case of PAMU, as it can support a window size of up
to 64G (even on 32bit).
Signed-off-by: NVarun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: NJoerg Roedel <joro@8bytes.org>

Implement the attribute for the MSM IOMMU driver.
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Error handling in msm_iommu_unmap() is broken. On some error
conditions retval is set to a non-zero value which causes
the function to return 'len' at the end. This hides the
error from the user. Zero should be returned in those error
cases.

Cc: David Brown <davidb@codeaurora.org>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: stable@vger.kernel.org # >= 3.1
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
Acked-by: NDavid Brown <davidb@codeaurora.org>

Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes.

This way the IOMMU core can split any arbitrary-sized physically
contiguous regions (that it needs to map) as needed.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Express sizes in bytes rather than in page order, to eliminate the
size->order->size conversions we have whenever the IOMMU API is calling
the low level drivers' map/unmap methods.

Adopt all existing drivers.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Joerg Roedel <Joerg.Roedel@amd.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: KyongHo Cho <pullip.cho@samsung.com>
Cc: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Convert the MSM IOMMU driver for ARM to use the new
interface for publishing the iommu_ops.
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Users of the IOMMU API (kvm specifically) assume that iommu_unmap()
returns the order of the unmapped page (on success).

Fix msm_iommu_unmap() accordingly.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
Cc: David Brown <davidb@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

This should ease finding similarities with different platforms,
with the intention of solving problems once in a generic framework
which everyone can use.

Compile-tested for MSM8X60.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>

Don't read from V2Pxx command registers when doing
iova-to-phys operations. These registers are write-only and
reading the value before modifying the VA bits is
unnecessary.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Remove the depencency on the IOMMU IDR register, as it may
not be accessible depending on the security configuraton.
This involves moving the NCB field of IDR into the platform
data.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Use ASID tags in the TLB instead of VMID tags in
preparation for changes to the secure environment.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Add clock control to the IOMMU driver. The IOMMU bus clock
(and potentially an AXI clock) need to be on to gain access
to IOMMU registers. Actively control these clocks when
needed instead of leaving them on.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Change msm_iommu_map to use GFP_ATOMIC instead of
GFP_KERNEL due to the fact that the call occurs within
a spinlock-protected region.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Remove some unneeded assignments and messages, restructure
a failure path in iova_to_phys, and make __flush_iotlb
return int in preparation for adding IOMMU clock control.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Add support for allowing IOMMU memory transactions to be
cache coherent, eliminating the need for software cache
management in certain situations. This can lead to
improvements in performance and power usage, assuming the
multimedia core's access pattern exhibits spatial locality
and that its working set fits into the cache.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

An IOMMU device can only be attached to one IOMMU domain at
any given time. Check whether the device is already
attached to a domain before allowing it to be attached to
another domain. If so, return busy.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Don't flush the page tables on an IOMMU domain if there are
no IOMMU devices attached to the domain. The act of
attaching to the domain will cause an implicit flush of
those areas if the page tables are configured to not be L2
cacheable.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Mark the init and exit functions as __init and __exit where
appropriate.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Add support for the IOMMUs found on the upcoming Qualcomm
MSM8x60 chips. These IOMMUs allow virtualization of the
address space used by most of the multimedia cores on these
chips.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>