1. 08 4月, 2015 3 次提交
  2. 27 3月, 2015 3 次提交
  3. 26 3月, 2015 4 次提交
  4. 19 3月, 2015 1 次提交
    • B
      apple-gmux: lock iGP IO to protect from vgaarb changes · 4eebd5a4
      Bruno Prémont 提交于
      As GMUX depends on IO for iGP to be enabled and active, lock the IO at
      vgaarb level. This should prevent GPU driver for dGPU to disable IO for
      iGP while it tries to own legacy VGA IO.
      
      This fixes usage of backlight control combined with closed nvidia
      driver on some Apple dual-GPU (intel/nvidia) systems.
      
      On those systems loading nvidia driver disables intel IO decoding,
      disabling the gmux backlight controls as a side effect.
      Prior to commits moving boot_vga from (optional) efifb to less optional
      vgaarb this mis-behavior could be avoided by using right kernel config
      (efifb enabled but vgaarb disabled).
      
      This patch explicitly does not try to trigger vgaarb changes in order
      to avoid confusing already running graphics drivers. If IO has been
      mis-configured by vgaarb gmux will thus fail to probe.
      It is expected to load/probe gmux prior to graphics drivers.
      
      Fixes: ce027dac592c0ada241ce0f95ae65856828ac450 # nvidia interaction
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=86121Reported-by: NPetri Hodju <petrihodju@yahoo.com>
      Tested-by: NPetri Hodju <petrihodju@yahoo.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Matthew Garrett <matthew.garrett@nebula.com>
      Signed-off-by: NBruno Prémont <bonbons@linux-vserver.org>
      Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
      4eebd5a4
  5. 15 3月, 2015 4 次提交
  6. 04 3月, 2015 5 次提交
  7. 19 2月, 2015 1 次提交
    • B
      x86/intel/quark: Add Isolated Memory Regions for Quark X1000 · 28a375df
      Bryan O'Donoghue 提交于
      Intel's Quark X1000 SoC contains a set of registers called
      Isolated Memory Regions. IMRs are accessed over the IOSF mailbox
      interface. IMRs are areas carved out of memory that define
      read/write access rights to the various system agents within the
      Quark system. For a given agent in the system it is possible to
      specify if that agent may read or write an area of memory
      defined by an IMR with a granularity of 1 KiB.
      
      Quark_SecureBootPRM_330234_001.pdf section 4.5 details the
      concept of IMRs quark-x1000-datasheet.pdf section 12.7.4 details
      the implementation of IMRs in silicon.
      
      eSRAM flush, CPU Snoop write-only, CPU SMM Mode, CPU non-SMM
      mode, RMU and PCIe Virtual Channels (VC0 and VC1) can have
      individual read/write access masks applied to them for a given
      memory region in Quark X1000. This enables IMRs to treat each
      memory transaction type listed above on an individual basis and
      to filter appropriately based on the IMR access mask for the
      memory region. Quark supports eight IMRs.
      
      Since all of the DMA capable SoC components in the X1000 are
      mapped to VC0 it is possible to define sections of memory as
      invalid for DMA write operations originating from Ethernet, USB,
      SD and any other DMA capable south-cluster component on VC0.
      Similarly it is possible to mark kernel memory as non-SMM mode
      read/write only or to mark BIOS runtime memory as SMM mode
      accessible only depending on the particular memory footprint on
      a given system.
      
      On an IMR violation Quark SoC X1000 systems are configured to
      reset the system, so ensuring that the IMR memory map is
      consistent with the EFI provided memory map is critical to
      ensure no IMR violations reset the system.
      
      The API for accessing IMRs is based on MTRR code but doesn't
      provide a /proc or /sys interface to manipulate IMRs. Defining
      the size and extent of IMRs is exclusively the domain of
      in-kernel code.
      
      Quark firmware sets up a series of locked IMRs around pieces of
      memory that firmware owns such as ACPI runtime data. During boot
      a series of unlocked IMRs are placed around items in memory to
      guarantee no DMA modification of those items can take place.
      Grub also places an unlocked IMR around the kernel boot params
      data structure and compressed kernel image. It is necessary for
      the kernel to tear down all unlocked IMRs in order to ensure
      that the kernel's view of memory passed via the EFI memory map
      is consistent with the IMR memory map. Without tearing down all
      unlocked IMRs on boot transitory IMRs such as those used to
      protect the compressed kernel image will cause IMR violations and system reboots.
      
      The IMR init code tears down all unlocked IMRs and sets a
      protective IMR around the kernel .text and .rodata as one
      contiguous block. This sanitizes the IMR memory map with respect
      to the EFI memory map and protects the read-only portions of the
      kernel from unwarranted DMA access.
      Tested-by: NOng, Boon Leong <boon.leong.ong@intel.com>
      Signed-off-by: NBryan O'Donoghue <pure.logic@nexus-software.ie>
      Reviewed-by: NAndy Shevchenko <andy.schevchenko@gmail.com>
      Reviewed-by: NDarren Hart <dvhart@linux.intel.com>
      Reviewed-by: NOng, Boon Leong <boon.leong.ong@intel.com>
      Cc: andy.shevchenko@gmail.com
      Cc: dvhart@infradead.org
      Link: http://lkml.kernel.org/r/1422635379-12476-2-git-send-email-pure.logic@nexus-software.ieSigned-off-by: NIngo Molnar <mingo@kernel.org>
      28a375df
  8. 12 2月, 2015 13 次提交
  9. 11 2月, 2015 1 次提交
  10. 10 2月, 2015 1 次提交
    • A
      toshiba_acpi: Make toshiba_eco_mode_available more robust · 98fc4ec6
      Azael Avalos 提交于
      Some Toshiba laptops do not come with the ECO led installed, however,
      the driver is registering support for it when it should not.
      
      This patch makes the toshiba_eco_mode_available function more robust
      in detecting ECO led capabilities, not registering the led on laptops
      that do not support it and registering the led when it really does.
      
      The ECO led function now returns 0x8e00 (Not Installed) by querying
      with in[3] = 0, whenever theres no physical LED installed, and
      returning 0x8300 (Input Data Error) when it is, however, there are
      some BIOSes that have stub function calls not returning anything and
      and the LED device was being registered too, hence the change of the
      default return value from 1 to 0.
      Signed-off-by: NAzael Avalos <coproscefalo@gmail.com>
      
      Minor comment update, fixed a whitespace error, s/truly/actual/.
      Signed-off-by: NDarren Hart <dvhart@linux.intel.com>
      98fc4ec6
  11. 08 2月, 2015 2 次提交
  12. 07 2月, 2015 2 次提交