1. 04 9月, 2009 2 次提交
    • P
      OMAP2/3/4: create omap_hwmod layer · 63c85238
      Paul Walmsley 提交于
      OMAP SoCs can be considered a collection of hardware IP blocks
      connected by various interconnects.  The bus topology and device
      integration data is somewhat more complex than platform_device can
      encode.  This patch creates code and structures to manage information
      about OMAP on-chip devices ("hardware modules") and their integration
      to the rest of the chip.  Hardware module data is intended to be
      generated dynamically from the TI hardware database for the OMAP4
      chips and beyond, easing Linux support for new chip variants.
      
      This code currently:
      
      - resets and configures all hardware modules upon startup, reducing bootloader
        dependencies;
      
      - provides hooks for Linux driver model code to enable, idle, and shutdown
        hardware modules (forthcoming patch);
      
      - waits for hardware modules to leave idle once their clocks
        are enabled and OCP_SYSCONFIG bits are set appropriately.
      
      - provides a means to pass arbitrary IP block configuration data (e.g.,
        FIFO size) to the device driver (via the dev_attr void pointer)
      
      In the future this code is intended to:
      
      - estimate interconnect bandwidth and latency characteristics to
        ensure constraints are satisfied during DVFS
      
      - provide *GRPSEL bit data to the powerdomain code
      
      - handle pin/ball muxing for devices
      
      - generate IO mapping information dynamically
      
      - supply device firewall configuration data
      
      - provide hardware module data to other on-chip coprocessor software
      
      - allow the removal of the "disable unused clocks" code in the OMAP2/3
        clock code
      
      This patch represents a collaborative effort involving many people from TI,
      Nokia, and the Linux-OMAP community.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Vikram Pandita <vikram.pandita@ti.com>
      Cc: Sakari Poussa <sakari.poussa@nokia.com>
      Cc: Anand Sawant <sawant@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Eric Thomas <ethomas@ti.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      63c85238
    • P
      OMAP2/3/4 PRCM: add module IDLEST wait code · 71348bca
      Paul Walmsley 提交于
      After a hardware module's clocks are enabled, Linux must wait for it
      to indicate readiness via its IDLEST bit before attempting to access
      the device, otherwise register accesses to the device may trigger an
      abort.  This has traditionally been implemented in the clock
      framework, but this is the wrong place for it: the clock framework
      doesn't know which module clocks must be enabled for a module to leave
      idle; and if a module is not in smart-idle mode, it may never leave
      idle at all.  This type of information is best stored in a
      per-hardware module data structure (coming in a following patch),
      rather than a per-clock data structure.  The new code will use these new
      functions to handle waiting for modules to enable.
      
      Once hardware module data is filled in for all of the on-chip devices,
      the clock framework code to handle IDLEST waiting can be removed.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      71348bca
  2. 29 8月, 2009 2 次提交
  3. 09 6月, 2009 1 次提交
  4. 29 5月, 2009 7 次提交
  5. 26 5月, 2009 2 次提交
  6. 22 5月, 2009 1 次提交
  7. 02 4月, 2009 1 次提交
  8. 24 3月, 2009 3 次提交
  9. 09 2月, 2009 2 次提交
  10. 11 12月, 2008 2 次提交
  11. 10 10月, 2008 1 次提交
  12. 09 10月, 2008 3 次提交
  13. 06 10月, 2008 1 次提交
    • T
      ARM: OMAP2: Move sleep.S into sleep24xx.S · 1835f1d7
      Tony Lindgren 提交于
      Some register offsets are different for 242x and 243x. This
      will allow compiling sleep code for both chips into the same
      kernel. Pass the addresses for SDRC_DDLA_CTRL and SDRC_POWER to the
      omap24xx_cpu_suspend instead of loading the values since the only.
      
      Also fix a bug to call omap2_sram_suspend with the value of SDRC_DLLA_CTRL
      instead of the address as that's what omap24xx_cpu_suspend expects to
      determine between DDR and SDR. This bug has not been noticed as
      the boards seem to have DDR instead of SDR.
      
      Note that some PM patches are still missing. The PM patches will
      be added later on once the base files are in sync with linux-omap
      tree.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      1835f1d7
  14. 19 8月, 2008 2 次提交
    • P
      ARM: OMAP2: Clockdomain: Add base OMAP2/3 clockdomain code · d459bfe0
      Paul Walmsley 提交于
      This patch creates an interface to the clockdomain registers in the
      PRM/CM modules on OMAP2/3.  This interface is intended to be used by
      PM code, e.g., pm.c; not by device drivers directly.
      
      The patch also adds clockdomain usecount tracking.  This is intended
      to be called whenever the first clock in a clockdomain is enabled, or
      when the last enabled clock in a clockdomain is disabled.  If the
      clockdomain is in software-supervised mode, the code will force-wakeup
      or force-sleep the clockdomain.  If the clockdomain is in
      hardware-supervised mode, the first clock enable will add sleep and
      wakeup dependencies on a user-selectable set of parent domains (usually
      MPU & IVA2), and the disable will remove them.
      
      Each clockdomain will be defined in later patches as static
      structures.  The clockdomain structures are linked into a list at boot
      by clkdm_register(), similar to the OMAP clock code.
      
      The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_CLOCKDOMAIN, which
      when enabled will emit verbose debug messages via pr_debug().
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      
      
      
      d459bfe0
    • P
      ARM: OMAP2: Powerdomain: Add base OMAP2/3 powerdomain code · ad67ef68
      Paul Walmsley 提交于
      This patch creates an interface to the powerdomain registers in the
      PRM/CM modules on OMAP2/3.  This interface is intended to be used by
      PM code, e.g., pm.c; not by device drivers directly.
      
      Each powerdomain will be defined in later patches as static
      structures.  Also defined are dependencies between powerdomains,
      used for adding and removing PM_WKDEP and CM_SLEEPDEP bits.  The
      powerdomain structures are linked into a list at boot by
      pwrdm_register(), similar to the OMAP clock code.
      
      The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_POWERDOMAIN, which
      when enabled will emit verbose debug messages via pr_debug().
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      
      
      
      ad67ef68
  15. 03 7月, 2008 3 次提交
  16. 15 4月, 2008 6 次提交
  17. 21 9月, 2007 1 次提交