1. 10 7月, 2009 2 次提交
  2. 21 6月, 2009 2 次提交
  3. 18 6月, 2009 4 次提交
  4. 17 6月, 2009 25 次提交
  5. 16 6月, 2009 2 次提交
    • I
      x86: mm: Read cr2 before prefetching the mmap_lock · 5dfaf90f
      Ingo Molnar 提交于
      Prefetch instructions can generate spurious faults on certain
      models of older CPUs. The faults themselves cannot be stopped
      and they can occur pretty much anywhere - so the way we solve
      them is that we detect certain patterns and ignore the fault.
      
      There is one small path of code where we must not take faults
      though: the #PF handler execution leading up to the reading
      of the CR2 (the faulting address). If we take a fault there
      then we destroy the CR2 value (with that of the prefetching
      instruction's) and possibly mishandle user-space or
      kernel-space pagefaults.
      
      It turns out that in current upstream we do exactly that:
      
      	prefetchw(&mm->mmap_sem);
      
      	/* Get the faulting address: */
      	address = read_cr2();
      
      This is not good.
      
      So turn around the order: first read the cr2 then prefetch
      the lock address. Reading cr2 is plenty fast (2 cycles) so
      delaying the prefetch by this amount shouldnt be a big issue
      performance-wise.
      
      [ And this might explain a mystery fault.c warning that sometimes
        occurs on one an old AMD/Semptron based test-system i have -
        which does have such prefetch problems. ]
      
      Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Nick Piggin <npiggin@suse.de>
      Cc: Pekka Enberg <penberg@cs.helsinki.fi>
      Cc: Vegard Nossum <vegard.nossum@gmail.com>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      Cc: Hugh Dickins <hugh.dickins@tiscali.co.uk>
      LKML-Reference: <20090616030522.GA22162@Krystal>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      5dfaf90f
    • C
      amd-iommu: resume cleanup · 6a047d8b
      Chris Wright 提交于
      Now that enable_iommus() will call iommu_disable() for each iommu,
      the call to disable_iommus() during resume is redundant.  Also, the order
      for an invalidation is to invalidate device table entries first, then
      domain translations.
      Signed-off-by: NChris Wright <chrisw@sous-sol.org>
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      6a047d8b
  6. 15 6月, 2009 5 次提交