Move the smartreflex header file
(arch/arm/mach-omap2/smartreflex.h) in a new header file
include/linux/power/smartreflex.h.

This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NJ Keerthy <j-keerthy@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

There is no point having the NET dependency on the select target, as it
forces all users to depend on NET to tell they support BPF_JIT.  Move
the config option to the bottom of the file - this could be a nice place
also for future "selectable" config symbols.

Fix up all users to drop the dependency on NET now that it is not
required to supress warnings for non-NET builds.
Reported-by: NLinus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
Acked-by: NDavid Miller <davem@davemloft.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

HARDIRQS_SW_RESEND and GENERIC_IRQ_PROBE are already defined as config
switches in the core Kconfig file. Select them instead of defining
them in ARM.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Now that the bulk of at91sam9g20-related nodes are located in at91sam9260.dtsi,
we have to re-create the path to this ADC node for SoC specific parts.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Use DT_MACHINE_START() on the emev2 based KZM9D board.

Also include a tiny DTS file to describe the board and
update the Kconfig dependencies to select CONFIG_USE_OF.

Update the SMP glue code to use OF for matching.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This is EMEV2 DT support V3. The support is limited to
whatever devices that are complied in the kernel. At this
point we have UARTs handled by "em-uart" and a timer
handled by "em-sti". Clocks and SMP are not supported.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Tie in the on-board Ethernet controller on KZM9D
and make use of the GPIO controller for external
IRQ pin support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Tie in the Emma Mobile GPIO driver "em-gio" to
support the GPIOs on Emma Mobile EV2.

A static IRQ range is used to allow boards to
hook up their platform devices to the GPIOs.

DT support is still on the TODO for the GPIO driver,
so only platform device support is included here.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This is V3 of Emma Mobile EV2 SMP support.

At this point only the most basic form of SMP operation
is supported. TWD and CPU Hotplug support is excluded.

Tied to both the Emma Mobile EV2 and the KZM9D board
due to the need to switch on board in platsmp.c and
the newly introduced need for static mappings.

The static mappings are needed to allow hardware
acces early during boot when SMP is initialized.
This early requirement forces us to also map in
the SMU registers.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

V3 of basic KZM9D board support. At this point a quite
thin layer that makes use of the Emma Mobile EV2 SoC code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This is V3 of the Emma Mobile EV2 SoC support.
Included here is support for serial and timer
devices which is just about enough to boot a kernel.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Commit ff9a184c ("ARM: 7400/1: vfp: clear fpscr length and stride bits
on entry to sig handler") flushes the VFP state prior to entering a
signal handler so that a VFP operation inside the handler will trap and
force a restore of ABI-compliant registers. Reflushing and disabling VFP
on the sigreturn path is predicated on the saved thread state indicating
that VFP was used by the handler -- however for SMP platforms this is
only set on context-switch, making the check unreliable and causing VFP
register corruption in userspace since the register values are not
necessarily those restored from the sigframe.

This patch unconditionally flushes the VFP state after a signal handler.
Since we already perform the flush before the handler and the flushing
itself happens lazily, the redundant flush when VFP is not used by the
handler is essentially a nop.
Reported-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NJon Medhurst <tixy@linaro.org>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

A zero value for prot_sect in the memory types table implies that
section mappings should never be created for the memory type in question.
This is checked for in alloc_init_section().

With LPAE, we set a bit to mask access flag faults for kernel mappings.
This breaks the aforementioned (!prot_sect) check in alloc_init_section().

This patch fixes this bug by first checking for a non-zero
prot_sect before setting the PMD_SECT_AF flag.
Signed-off-by: NVitaly Andrianov <vitalya@ti.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

the old codes will cause 3.4 kernel warning as irq domain size is wrong:
------------[ cut here ]------------
WARNING: at kernel/irq/irqdomain.c:74 irq_domain_legacy_revmap+0x24/0x48()
Modules linked in:
[<c0013f50>] (unwind_backtrace+0x0/0xf8) from [<c001e7d8>] (warn_slowpath_common+0x54/0x64)
[<c001e7d8>] (warn_slowpath_common+0x54/0x64) from [<c001e804>] (warn_slowpath_null+0x1c/0x24)
[<c001e804>] (warn_slowpath_null+0x1c/0x24) from [<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48)
[<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48) from [<c005c704>] (irq_create_mapping+0x20/0x120)
[<c005c704>] (irq_create_mapping+0x20/0x120) from [<c005c880>] (irq_create_of_mapping+0x7c/0xf0)
[<c005c880>] (irq_create_of_mapping+0x7c/0xf0) from [<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34)
[<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34) from [<c01a6c68>] (of_irq_to_resource+0x18/0x74)
[<c01a6c68>] (of_irq_to_resource+0x18/0x74) from [<c01a6ce8>] (of_irq_count+0x24/0x34)
[<c01a6ce8>] (of_irq_count+0x24/0x34) from [<c01a7220>] (of_device_alloc+0x58/0x158)
[<c01a7220>] (of_device_alloc+0x58/0x158) from [<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80)
[<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80) from [<c01a7468>] (of_platform_bus_create+0xc8/0x190)
[<c01a7468>] (of_platform_bus_create+0xc8/0x190) from [<c01a74cc>] (of_platform_bus_create+0x12c/0x190)
---[ end trace 1b75b31a2719ed32 ]---
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Current IRQ16-IRQ31 irq number are located around 800 from
1ee8299a
(ARM: mach-shmobile: Use 0x3400 as INTCS vector offset)

But, the PINT0/1 IRQ number are also located around 800 from
0df1a838
(ARM: mach-shmobile: sh73a0 PINT IRQ base fix)

This patch relocates PINT0/1 IRQ number to around 700 where is not used,
and adds current IRQ location table in comment area.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

No one uses the per-hw list of buses, so get rid of this.  Instead,
build the list locally.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Use sys->private_data to store the PCIe port data structure.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Cc: <stable@vger.kernel.org>
Reported-by: NAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch contains two changes:
- Removed unused definitions from mach/irqs.h
- Do not mask interrupts in ack procedure, because we have separate
  intX_mask procedure for do it and actually these 2 functions are
  called sequentially
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The nomadik gpio code has been converted to pinctrl, but the nomadik platform
still expects the old code to be present. Change it to use the new one instead.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

All functions from this header already provided by common.c
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

ep7312 has been supported for a very long time, but has never
been mentioned in the Kconfig file.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This allows us to keep everything in a single place.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

There is no reason to have the clps7111.h header in a globally
visible location, so move it to a place that is only visible when
building for mach-clps711x.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

flowctrl_write_cpu_csr uses the cpu halt offsets and vice versa. This patch
fixes this bug.
Reported-by: NDan Willemsen <dwillemsen@nvidia.com>
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
[swarren: This problem was introduced in v3.4-rc1, in commit 26fe681f "ARM:
 tegra: functions to access the flowcontroller", when this file was first
 added]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add missing __init markups to GPIO and timer functions.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Move to using a refined pr_fmt to avoid having to manually
prefix every message line with 'ts78xx'.

Changelog:
 v2: moved pr_fmt define ahead of includes as suggested by
	Hartley Sweeten to avoid use of leading undef
 v1: initial release
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Move ts78xx_fpga from /sys/power to /sys/firmware so that
we can remove the PM dependency.
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Changelog:
 v2: use DEFINE_RES_MEM as suggesed by Hartley Sweeten
 v1: inital release
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Wrongly placed __initdata, and missing __init caused these warnings.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

Orion5x board files which don't have PCI give warnings:

arch/arm/mach-orion5x/common.h:54:38: warning: 'struct pci_dev' declared
inside parameter list.

Add a forward declaration in the header file, which is the pattern
used for other PCI structures.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>

There are no board specific configurations that need user
intervention, so just make MACH_SPEAR600 the silent default
for ARCH_SPEAR6XX to prevent users from turning it off, which
would result in a build error.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: NViresh Kumar <viresh.kumar@st.com>

Current ARM7 Cirrus Logic product line contains only 3 cpu.
EP7312 - Fully functional.
EP7309 - Missing SDRAM interface.
EP7311 - Missing DAI.
It makes no sense to separate the header files to identify these differences,
it is only necessary to keep in mind the presence or lack of any features of
a specific CPU when writing code.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Most PCI implementations perform simple root bus scanning.  Rather than
having each group of platforms provide a duplicated bus scan function,
provide the PCI configuration ops structure via the hw_pci structure,
and call the root bus scanning function from core ARM PCI code.
Acked-by: NKrzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Most PCI implementations use the standard PCI swizzle function, which
handles the well defined behaviour of PCI-to-PCI bridges which can be
found on cards (eg, four port ethernet cards.)

Rather than having almost every platform specify the standard swizzle
function, make this the default when no swizzle function is supplied.
Therefore, a swizzle function only needs to be provided when there is
something exceptional which needs to be handled.

This gets rid of the swizzle initializer from 47 files, and leaves us
with just two platforms specifying a swizzle function: ARM Integrator
and Chalice CATS.
Acked-by: NKrzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is at odds with the documentation in the file; it says pin 1 on
slots 24,25,26,27 map to IRQs 27,28,29,30, but the function will always
be entered with slot=0 due to the lack of swizzle function.  Fix this
function to behave as the comments say, and use the standard PCI
swizzle.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Integrator swizzle function is almost the same as the standard PCI
swizzle, except for an initial check for pin = 0.  Make the integrator
swizzle function a wrapper around the standard PCI swizzle function so
we preseve this behaviour while using common code.

[fix to use pci_std_swizzle from Linus Walleij]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>