- 25 2月, 2010 1 次提交
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由 Thara Gopinath 提交于
This patch adds the flag .pwrsts_logic_ret info for the core power domain in the associated powerdomain structure. This flag specifies the states core domain logic can hit in event of the domain entering retention. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 30 1月, 2010 1 次提交
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由 Paul Walmsley 提交于
Convert CONFIG_ARCH_OMAP34XX to CONFIG_ARCH_OMAP3, and CONFIG_ARCH_OMAP24XX to CONFIG_ARCH_OMAP2, in preparation for Tony's multi-OMAP patches. While here, update some copyrights, convert instances of "34xx" to "3xxx" where applicable, and convert preprocessor directives of the form #if defined(CONFIG_ARCH_OMAP2) | defined(CONFIG_ARCH_OMAP3) to #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) for standardization. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
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- 27 1月, 2010 1 次提交
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由 Paul Walmsley 提交于
Move clockdomain wakeup dependency and sleep dependency data structures from the powerdomain layer to the clockdomain layer, where they belong. These dependencies were originally placed in the powerdomain layer due to unclear documentation; however, it is clear now that these dependencies are between clockdomains. For OMAP2/3, this is not such a big problem, but for OMAP4 this needs to be fixed. Thanks to Benoît Cousson <b-cousson@ti.com> for his advice on this patch. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
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- 12 12月, 2009 1 次提交
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由 Thara Gopinath 提交于
MPU power domain bank 0 bits are displayed in position of bank 1 in PWRSTS and PREPWRSTS registers. So read them from correct position Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 12 11月, 2009 1 次提交
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由 Kalle Jokiniemi 提交于
The hardware SAVEANDRESTORE mechanism seems to leave USB HOST power domain permanently into active state after one transition from off to active state. Disabling for now. Signed-off-by: NKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 21 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 2月, 2009 2 次提交
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由 Paul Walmsley 提交于
Richard Woodruff writes that chip errata prevent USBTLL SAR from working on OMAP3 ES levels before ES3.1: http://marc.info/?l=linux-arm-kernel&m=123319614808833&w=2 Update the OMAP3 powerdomain structures appropriately. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Paul Walmsley 提交于
Some OMAP3 chip behaviors change in ES levels after ES2. Modify the existing omap_chip flags to add options for ES3.0 and ES3.1. Add a new macro, CHIP_GE_OMAP3430ES2, to cover ES levels from ES2 onwards - a common pattern for OMAP3 features. Update all current users of the omap_chip macros to use this new macro. Also add CHIP_GE_OMAP3430ES3_1 to cover the USBTLL SAR errata case (described and fixed in the following patch) Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 2月, 2009 3 次提交
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由 Paul Walmsley 提交于
The SGX device on OMAP3 does not support retention, so remove RET from the list of possible SGX power states. Problem debugged by Richard Woodruff <r-woodruff2@ti.com>. Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Paul Walmsley 提交于
Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and clockdomain; so, create powerdomain and clockdomain structures for them. Mark each DPLL clock as belonging to their respective DPLL clockdomain. cf. 34xx TRM Table 4-27 (among other references). linux-omap source commits are acdb615850b9b4f7d1ab68133a16be8c8c0e7419 and a8798a48f33e9268dcc7f30a4b4a3ce4220fe0c9. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Paul Walmsley 提交于
Remove usbhost_sar_fclk from the OMAP3 clock framework. The bit that the clock was tweaking doesn't actually enable or disable a clock; it controls whether the hardware will save and restore USBHOST state when the powerdomain changes state. (That happens to coincidentally enable a clock for the duration of the operation, hence the earlier confusion.) In place of the clock, mark the USBHOST powerdomain as supporting hardware save-and-restore functionality. linux-omap source commit is f3ceac86a9d425d101d606d87a5af44afef27179. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 8月, 2008 1 次提交
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由 Paul Walmsley 提交于
Add OMAP3-specific powerdomains. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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