Commit f62349ee had side effect that
causes kernel to oops when we are suspending to ram:

	# echo mem > /sys/power/state

	WARNING: at kernel/irq/manage.c:858 __free_irq+0x90/0x174()
	Trying to free already-free IRQ 72
	Modules linked in:
	Backtrace:
	[<c00328d0>] (dump_backtrace+0x0/0x110) from [<c0347298>] (dump_stack+0x18/0x1c)
	 r7:dfd4be08 r6:c009505c r5:c03fbfd1 r4:0000035a
	[<c0347280>] (dump_stack+0x0/0x1c) from [<c005a408>] (warn_slowpath_common+0x50/0x68)
	[<c005a3b8>] (warn_slowpath_common+0x0/0x68) from [<c005a46c>] (warn_slowpath_fmt+0x30)
	 r7:c0474afc r6:00000048 r5:00000000 r4:c0474ac0
	[<c005a43c>] (warn_slowpath_fmt+0x0/0x38) from [<c009505c>] (__free_irq+0x90/0x174)
	 r3:00000048 r2:c03fc0ef
	[<c0094fcc>] (__free_irq+0x0/0x174) from [<c0095184>] (free_irq+0x44/0x64)
	[<c0095140>] (free_irq+0x0/0x64) from [<c0038100>] (omap_uart_enable_irqs+0x4c/0x90)
	 r7:c034d58c r6:00000003 r5:00000000 r4:c0463028
	[<c00380b4>] (omap_uart_enable_irqs+0x0/0x90) from [<c003d8f8>] (omap3_pm_begin+0x1c/0)
	 r5:00000003 r4:00000000
	[<c003d8dc>] (omap3_pm_begin+0x0/0x28) from [<c008d008>] (suspend_devices_and_enter+0x)
	[<c008cfd8>] (suspend_devices_and_enter+0x0/0x1dc) from [<c008d29c>] (enter_state+0xe8)
	 r5:c03f7f46 r4:00000000
	[<c008d1b4>] (enter_state+0x0/0x140) from [<c008c8e0>] (state_store+0x9c/0xc4)
	 r7:c034d58c r6:00000003 r5:00000003 r4:c03f7f46
	[<c008c844>] (state_store+0x0/0xc4) from [<c01cb2dc>] (kobj_attr_store+0x20/0x24)
	[<c01cb2bc>] (kobj_attr_store+0x0/0x24) from [<c0119420>] (sysfs_write_file+0x114/0x14)
	[<c011930c>] (sysfs_write_file+0x0/0x148) from [<c00cb298>] (vfs_write+0xb8/0x164)
	[<c00cb1e0>] (vfs_write+0x0/0x164) from [<c00cb408>] (sys_write+0x44/0x70)
	 r8:4001f000 r7:00000004 r6:df81bd00 r5:00000000 r4:00000000
	[<c00cb3c4>] (sys_write+0x0/0x70) from [<c002f040>] (ret_fast_syscall+0x0/0x38)
	 r8:c002f204 r7:00000004 r6:401fa5e8 r5:4001f000 r4:00000004

This is due the fact that uart_list list was populated in
omap_serial_early_init() and omap_uart_enable_irqs() went through this
list even when serial idle wasn't enabled for all uarts.

This patch moves the code that populates the uart_list and enables uart
clocks into omap_serial_init_port().
Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Recent drivers/mfd/twl4030* renames to twl broke compile for
various boards as the series was missing a patch to change
the board-*.c files.

This patch renames include twl4030.h to include twl.h
and also renames twl4030_i2c_ routines.
Signed-off-by: NBalaji T K <balajitk@ti.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: NFelipe Balbi <felipe.balbi@nokia.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP34XX has EHCI, so select USB_ARCH_HAS_EHCI.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Acked-by: NAnand Gadiyar <gadiyar@ti.com>
Acked-by: NFelipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The upcoming TWL6030 is companion chip for OMAP4 like the current TWL4030
for OMAP3. The common modules like RTC, Regulator creates opportunity
to re-use the most of the code from twl4030.

This patch renames few common drivers twl4030* files to twl* to enable
the code re-use.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The power scripts optimisation was mainly done by:
Tero Kristo <tero.kristo@nokia.com> and
Arnaud Mandy <ext-arnaud.2.mandy@nokia.com>

I'm only refactoring and testing it against the mainline kernel.
Signed-off-by: NAmit Kucheria <amit.kucheria@verdurent.com>
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: linux-omap@vger.kernel.org
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

OMAP3xxx and OMAP4430 UART IP blocks have a restriction wrt RX FIFO.
Empty RX fifo read causes an abort.

OMAP3xxx:
	UART IP revision >= 0x52 have this issue
	MVR register format is:
	Bits  Field Name  Description  				Type  Reset
	31:8   RESERVED 					RO  	0x0
	7:4    MAJOR  	Major revision number of the module.  	RO  	0x--
	3:0    MINOR  	Minor revision number of the module.  	RO  	0x--

OMAP4xxx:
	All revisions have this issue
	Revision id check is not used as the format of MVR resigster has changed
	For omap4 MVR register reads as: 0x50410602 => Revision id = 0x0602
	Format of MVR register on omap4 is: (Courtesy: Cousson, Benoit)
	Bits  Field Name  Description  				Type  Reset
	31:30 SCHEME  	Scheme revision number of module  	RO  	0x1
	29:28 RESERVED   					RO  	0x1
	27:16 FUNC  	Function revision number of module  	RO  	0x041
	15:11 RTL  		Rtl revision number of module  	RO  	0x00
	10:8  MAJOR 	Major revision number of the module.  	RO  	0x6
	7:6   CUSTOM  	Custom revision number of the module.  	RO  	0x0
	5:0   MINOR  	Minor revision number of the module.  	RO  	0x02

Override the default 8250 read handler: mem_serial_in()
by a custom handler: serial_in_8250()
which makes sure that RX fifo is not read when empty

tested on zoom3(3630) board

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NVikram Pandita <vikram.pandita@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Update the hsmmc zoom peripheral configuration to support:
Power saving mode
mmc2 8-bit support
Configure mmc2 as non removable
Signed-off-by: NMadhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The runtime detection of OMAP3515 and OMAP3525
was reversed.
Signed-off-by: NSergey Lapin <slapin@ossfans.org>
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Otherwise Extreme Lower Power (ELP) wakeup doesn't work properly.
Signed-off-by: NKalle Valo <kalle.valo@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap3: zoom2/3: make MMC slot work again

Commit 12f8dfb56 accidentally broke MMC on zoom2/3.
The .vmmc1 field of zoom_twldata was deleted. Restoring it
allows the MMC slot to work again
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Acked-by: NMadhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds new function: omap_serial_init_port(port) that can be
used to initialize only selected UARTs as serial ports. Platforms can
then in their board files call this function instead of omap_serial_init()
if they don't want to use all UARTs as serial ports.
Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

CM-T35 can be assembled with different set of peripherals thus making
certain interfaces available to user as GPIOs or dedicated pins. Because
of it CM-T35 bootloader sets up mux configuration only for pins
necessary to boot the system and the rest of the mux configuration is
done by the kernel. Besides, having mux configuration in the kernel
allows to minimize dependancy on bootloader.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The secondary cores wakes up in time so the wait loop is not
necessary anymore.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The AuxCoreBoot0 and AuxCoreBoot1 can be only accessed in secure
mode. Replace the current code with secure monitor API's to access/modify
these registers.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch fixes the OMAP4430 cpu detection. The IC rev detection is
done with hawkeye and rev. Note that rev does not map directly to
defined processor revision numbers as ES1.0 uses value 0.It also fixes
the SCM base address to read the correct ID_CODE register.

Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated
instead of always being true
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Pandora board file updates:
- change keycodes of game buttons
  it was decided not to use ABXY layout by the developers.
- drop i2c bus 3 speed to 100kHz
  this is needed for battery monitoring chip to work reliably.
- drop pandora_lcd platform_device
  the older DSS driver was never functional on l-o or mainline
  kernels due to missing panel driver, so remove unneeded
  pandora_lcd platform_device. This also removes last OMAP_TAG
  from the board file.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Board file of Always Innovating OMAP3-based Touch Book
Signed-off-by: NGregoire Gentil <gregoire@gentil.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use smc91x_platdata to setup smc91x, so we can get rid of OMAP specific stuff
in smc91x driver
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add 36xx CBP package support

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove old mux code for 34xx
Signed-off-by: NTony Lindgren <tony@atomide.com>

Replace omap_cfg_reg() with new style signal or gpio functions
Signed-off-by: NTony Lindgren <tony@atomide.com>

Otherwise we cannot limit new mux code to mach-omap2.
The same signal names should eventually work for other
omaps under mach-omap2.

Note that these pins don't need to be OMAP_PIN_INPUT_PULLUP,
just OMAP_PIN_INPUT is enough.

Cc: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add debugfs support for new mux code
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add new style mux init functions to omap3 board-*.c files

So far Beagle has been confirmed to be a CBB package,
and CM-T35 a CUS package.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add new style mux data for 34xx. This should also
work with 3630 easily by adding the processor subset
and ball data.

Note that this data is __initdata, and gets optimized
out except for the GPIO pins if CONFIG_OMAP_MUX
is not set.

Also note that this data uses omap3630 naming for
the SDMMC registers instead of 34xx naming with just
MMC.

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Initially only for 34xx. This code allows us to:

- Make the code more generic as the omap internal signal
  names can stay the same across omap generations for some
  devices

- Map mux registers to GPIO registers that is needed for
  dynamic muxing of pins during off-idle

- Override bootloader mux values via kernel cmdline using
  omap_mux=some.signa1=0x1234,some.signal2=0x1234

- View and set the mux registers via debugfs if
  CONFIG_DEBUG_FS is enabled

Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

intoduce omap_mux_{read,write}
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NTony Lindgren <tony@atomide.com>

An api at init for all dpll nodes seem to be
needed to reparent the dpll clk node to its
bypass clk in case the dpll is in bypass.
If not done this causes sequencing issues at init
during propogate_rate.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

Most of the dpll api's from dpll.c are reused for OMAP4.
This patch does extend a few api's for OMAP4 support.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch moves all the dpll control api's to a
common file dpll.c. This is in preperation of omap4
support wherein most of these api's can be reused.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds dummy hooks for OMAP4 dpll api's. Removes
dummy hooks for clkdev api's and enables CLKDEV
for OMAP4.
Also comments clockdomain calls from within the clock
framework as its not supported yet for OMAP4.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch defines all the clock nodes in OMAP4430
platform. All the clock node structs and the clkdev table is
autogenerated using a python script (gen_clock_tree.py)
developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.py) developed by Benoit
Cousson, Paul Walmsley and Rajendra Nayak.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific PRM register bit field
shifts and masks. Auto generated using a python script
(gen_prm_shifts_and_mask.py) developed by Benoit Cousson,
Paul Walmsley and Rajendra Nayak.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific PRM register defs. Auto generated
using a python script (gen_prm_4430_h.py) developed by Paul
Walmsley and Benoit Cousson.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific CM1 and CM2 module
register defs. Autogenerated using a python scripts
(gen_cm1_4430_h.py,gen_cm2_4430_h.py) developed
by Paul Walmsley and Benoit Cousson.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds the offsets for new modules in PRM
and CM for OMAP4
These are autogenerated using a python script (gen_prcm44xx_h.py)
developed by Paul Walmsley and Benoit Cousson.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch fixes the PRM and CM base addresses and adds
a new CM2 base address for OMAP4
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

WARN if a clock/hwmod is missing a clockdomain association since
resulting hwmod will not be able to correctly enable/disable clocks.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Earlier, the hwmod code had considered the OCP_SYSCONFIG.CLOCKACTIVITY
bits to be incremental power saving bits, controlling internal IP
block clock gates.  This was a misapprehension.  The CLOCKACTIVITY
bits are used to indicate, in advance, which clocks will be cut when
the module acknowledges an idle request.  This enables the IP block to
take whatever action is necessary to complete any in-progress work
before asserting its IdleAck.

In the current Linux-OMAP code, this implies that the clock framework
should be changing module CLOCKACTIVITY bits as module clocks are enabled
and disabled.  We don't do that yet, but in the future, we should.
This must wait until the clock tree is annotated with omap_hwmod pointers
(or vice-versa).  In the meantime, drop most of the hwmod code that
controls CLOCKACTIVITY bits to avoid confusion.

This patch has benefited from many illuminating discussions with (in
alphabetical order) Benoît Cousson <b-cousson@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Sebastien Sabatier <s-sabatier1@ti.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Sebastien Sabatier <s-sabatier1@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>