1. 30 4月, 2016 6 次提交
  2. 01 3月, 2016 3 次提交
  3. 12 1月, 2016 2 次提交
  4. 13 12月, 2015 5 次提交
  5. 26 10月, 2015 2 次提交
  6. 01 10月, 2015 1 次提交
  7. 30 9月, 2015 1 次提交
  8. 31 8月, 2015 1 次提交
  9. 30 8月, 2015 4 次提交
  10. 16 8月, 2015 12 次提交
  11. 22 6月, 2015 1 次提交
  12. 19 6月, 2015 2 次提交
    • I
      drm/exynos: fimd: fix page fault issue with iommu · 94ab95a9
      Inki Dae 提交于
      This patch resolves page fault issue with iommu and atomic feature
      when modetest test application is terminated.
      
      ENWIN_F field of WINCONx register enables or disable a dma channel to
      each hardware overlay - the value of the field will be updated to real
      register after vsync.
      
      So this patch makes sure the dma channel is disabled by waiting for vsync
      one time after clearing shadow registers to all dma channels.
      
      Below shows the page fault issue:
      setting mode 720x1280-60Hz@XR24 on connectors 31, crtc 29
      freq: 59.99Hz
      
      [   34.831025] PAGE FAULT occurred at 0x20400000 by 11e20000.sysmmu(Page
      		table base: 0x6e324000)
      [   34.838072]  Lv1 entry: 0x6e92dc01
      [   34.841489] ------------[ cut here ]------------
      [   34.846058] kernel BUG at drivers/iommu/exynos-iommu.c:364!
      [   34.851614] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
      [   34.857428] Modules linked in:
      <--snip-->
      [   35.210894] [<c02880d0>] (exynos_sysmmu_irq) from [<c00608f8>]
      (handle_irq_event_percpu+0x78/0x134)
      [   35.219914] [<c00608f8>] (handle_irq_event_percpu) from [<c00609f0>]
      (handle_irq_event+0x3c/0x5c)
      [   35.228768] [<c00609f0>] (handle_irq_event) from [<c0063698>]
      (handle_level_irq+0xc4/0x13c)
      [   35.237101] [<c0063698>] (handle_level_irq) from [<c005ff7c>]
      (generic_handle_irq+0x2c/0x3c)
      [   35.245521] [<c005ff7c>] (generic_handle_irq) from [<c02214ec>]
      (combiner_handle_cascade_irq+0x94/0x100)
      [   35.254980] [<c02214ec>] (combiner_handle_cascade_irq) from
      [<c005ff7c>] (generic_handle_irq+0x2c/0x3c)
      [   35.264353] [<c005ff7c>] (generic_handle_irq) from [<c0060248>]
      (__handle_domain_irq+0x7c/0xec)
      [   35.273034] [<c0060248>] (__handle_domain_irq) from [<c0009434>]
      (gic_handle_irq+0x30/0x68)
      [   35.281366] [<c0009434>] (gic_handle_irq) from [<c0012ec0>]
      (__irq_svc+0x40/0x74)
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      94ab95a9
    • M
      drm/exynos: fimd: ensure proper hw state in fimd_clear_channel() · fb88e214
      Marek Szyprowski 提交于
      One should not do any assumptions on the stare of the fimd hardware
      during driver initialization, so to properly reset fimd before enabling
      IOMMU, one should ensure that all power domains and clocks are really
      enabled. This patch adds pm_runtime and clocks management in the
      fimd_clear_channel() function to ensure that any access to fimd
      registers will be performed with clocks and power domains enabled.
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      fb88e214