1. 02 12月, 2014 1 次提交
    • J
      powerpc/oprofile: Disable pagefaults during user stack read · 0de3b56b
      Jiang Lu 提交于
      A page fault occurred during reading user stack in oprofile backtrace
      would lead following calltrace:
      
      WARNING: at linux/kernel/smp.c:210
      Modules linked in:
      CPU: 5 PID: 736 Comm: sh Tainted: G W 3.14.23-WR7.0.0.0_standard #1
      task: c0000000f6208bc0 ti: c00000007c72c000 task.ti: c00000007c72c000
      NIP: c0000000000ed6e4 LR: c0000000000ed5b8 CTR: 0000000000000000
      REGS: c00000007c72f050 TRAP: 0700 Tainted: G W (3.14.23-WR7.0.0
      tandard)
      MSR: 0000000080021000 <CE,ME> CR: 48222482 XER: 00000000
      SOFTE: 0
      GPR00: c0000000000ed5b8 c00000007c72f2d0 c0000000010aa048 0000000000000005
      GPR04: c000000000fdb820 c00000007c72f410 0000000000000001 0000000000000005
      GPR08: c0000000010b5768 c000000000f8a048 0000000000000001 0000000000000000
      GPR12: 0000000048222482 c00000000fffe580 0000000022222222 0000000010129664
      GPR16: 0000000010143cc0 0000000000000000 0000000044444444 0000000000000000
      GPR20: c00000007c7221d8 c0000000f638e3c8 000003f15a20120d 0000000000000001
      GPR24: 000000005a20120d c00000007c722000 c00000007cdedda8 00003fffef23b160
      GPR28: 0000000000000001 c00000007c72f410 c000000000fdb820 0000000000000006
      NIP [c0000000000ed6e4] .smp_call_function_single+0x18c/0x248
      LR [c0000000000ed5b8] .smp_call_function_single+0x60/0x248
      Call Trace:
      [c00000007c72f2d0] [c0000000000ed5b8] .smp_call_function_single+0x60/0x248 (unreliable)
      [c00000007c72f3a0] [c000000000030810] .__flush_tlb_page+0x164/0x1b0
      [c00000007c72f460] [c00000000002e054] .ptep_set_access_flags+0xb8/0x168
      [c00000007c72f500] [c0000000001ad3d8] .handle_mm_fault+0x4a8/0xbac
      [c00000007c72f5e0] [c000000000bb3238] .do_page_fault+0x3b8/0x868
      [c00000007c72f810] [c00000000001e1d0] storage_fault_common+0x20/0x44
       Exception: 301 at .__copy_tofrom_user_base+0x54/0x5b0
          LR = .op_powerpc_backtrace+0x190/0x20c
      [c00000007c72fb00] [c000000000a2ec34] .op_powerpc_backtrace+0x204/0x20c (unreliable)
      [c00000007c72fbc0] [c000000000a2b5fc] .oprofile_add_ext_sample+0xe8/0x118
      [c00000007c72fc70] [c000000000a2eee0] .fsl_emb_handle_interrupt+0x20c/0x27c
      [c00000007c72fd30] [c000000000a2e440] .op_handle_interrupt+0x44/0x58
      [c00000007c72fdb0] [c000000000016d68] .performance_monitor_exception+0x74/0x90
      [c00000007c72fe30] [c00000000001d8b4] exc_0x260_common+0xfc/0x100
      
      performance_monitor_exception() is executed in a context with interrupt
      disabled and preemption enabled. When there is a user space page fault
      happened, do_page_fault() invoke in_atomic() to decide whether kernel
      should handle such page fault. in_atomic() only check preempt_count.
      So need call pagefault_disable() to disable preemption before reading
      user stack.
      Signed-off-by: NJiang Lu <lu.jiang@windriver.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0de3b56b
  2. 25 9月, 2014 1 次提交
  3. 28 7月, 2014 1 次提交
  4. 19 3月, 2014 1 次提交
  5. 15 1月, 2014 1 次提交
  6. 04 9月, 2013 3 次提交
  7. 08 8月, 2013 1 次提交
  8. 29 1月, 2013 1 次提交
  9. 10 1月, 2013 1 次提交
    • A
      powerpc: Build kernel with -mcmodel=medium · 1fbe9cf2
      Anton Blanchard 提交于
      Finally remove the two level TOC and build with -mcmodel=medium.
      
      Unfortunately we can't build modules with -mcmodel=medium due to
      the tricks the kernel module loader plays with percpu data:
      
      # -mcmodel=medium breaks modules because it uses 32bit offsets from
      # the TOC pointer to create pointers where possible. Pointers into the
      # percpu data area are created by this method.
      #
      # The kernel module loader relocates the percpu data section from the
      # original location (starting with 0xd...) to somewhere in the base
      # kernel percpu data space (starting with 0xc...). We need a full
      # 64bit relocation for this to work, hence -mcmodel=large.
      
      On older kernels we fall back to the two level TOC (-mminimal-toc)
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1fbe9cf2
  10. 09 10月, 2012 1 次提交
  11. 07 9月, 2012 1 次提交
    • C
      powerpc/oprofile: Fix marked events support on Power7+ not set. · adbf115d
      Carl E. Love 提交于
      Starting with Power 7+ we need to check for marked events if the SIAR
      register is valid, i.e. it contains the correct address of the instruction
      at the time the performance counter overflowed.  The mmcra register on
      Power 7+, contains a new bit to indicate that the contents of the SIAR
      is valid. If the event is not marked, then the sample is recorded
      independently of the SIAR valid bit setting.  For older processors, there
      is no SIAR valid bit to check so the samples are always recorded.  This is
      done by forcing the cntr_marked_events bit mask to zero.  The code will
      always record the sample in this case since the bit mask says the event is
      not a marked event even if it really is a marked event.
      Signed-off-by: NCarl Love <cel@us.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      adbf115d
  12. 05 9月, 2012 1 次提交
  13. 29 3月, 2012 1 次提交
  14. 21 3月, 2012 1 次提交
  15. 26 5月, 2011 1 次提交
  16. 24 5月, 2011 1 次提交
  17. 31 3月, 2011 1 次提交
  18. 02 11月, 2010 1 次提交
  19. 14 10月, 2010 1 次提交
    • S
      oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt. · 4267ea72
      Scott Wood 提交于
      On an arch 2.06 hypervisor, a pending perfmon interrupt will be delivered
      to the hypervisor at any point the guest is running, regardless of
      MSR[EE].  In order to reflect this interrupt, the hypervisor has to mask
      the interrupt in PMGC0 -- and set MSRP[PMMP] to intercept futher guest
      accesses to the PMRs to detect when to unmask (and prevent the guest from
      unmasking early, or seeing inconsistent state).
      
      This has the side effect of ignoring any changes the guest makes to
      MSR[PMM], so wait until after the interrupt is clear, and thus the
      hypervisor should have cleared MSRP[PMMP], before setting MSR[PMM].  The
      counters wil not actually run until PMGC0[FAC] is cleared in
      pmc_start_ctrs(), so this will not reduce the effectiveness of PMM.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      4267ea72
  20. 13 10月, 2010 1 次提交
  21. 02 9月, 2010 1 次提交
  22. 14 7月, 2010 1 次提交
  23. 07 6月, 2010 1 次提交
  24. 04 6月, 2010 1 次提交
  25. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  26. 04 12月, 2009 1 次提交
  27. 09 11月, 2009 1 次提交
  28. 08 7月, 2009 1 次提交
  29. 16 6月, 2009 1 次提交
    • M
      powerpc: Add configurable -Werror for arch/powerpc · ba55bd74
      Michael Ellerman 提交于
      Add the option to build the code under arch/powerpc with -Werror.
      
      The intention is to make it harder for people to inadvertantly introduce
      warnings in the arch/powerpc code. It needs to be configurable so that
      if a warning is introduced, people can easily work around it while it's
      being fixed.
      
      The option is a negative, ie. don't enable -Werror, so that it will be
      turned on for allyes and allmodconfig builds.
      
      The default is n, in the hope that developers will build with -Werror,
      that will probably lead to some build breaks, I am prepared to be flamed.
      
      It's not enabled for math-emu, which is a steaming pile of warnings.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ba55bd74
  30. 19 5月, 2009 1 次提交
  31. 15 5月, 2009 1 次提交
    • M
      powerpc: Fix oprofile sampling of marked events on POWER7 · e5fc948b
      Maynard Johnson 提交于
      Description
      -----------
      Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on
      older processors where those bits are defined.
      
      Background
      ----------
      The performance monitor unit of the 64-bit POWER processor family has the
      ability to collect accurate instruction-level samples when profiling on marked
      events (i.e., "PM_MRK_<event-name>").  In processors prior to POWER6, the MMCRA
      register contained "slot information" that the oprofile kernel driver used to
      adjust the value latched in the SIAR at the time of a PMU interrupt.  But as of
      POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use,
      since the SIAR itself holds the accurate sampled instruction address.  With
      POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of
      these slot bits was, in effect, a NOP.  But with POWER7, these bits are no
      longer zero'ed out; however, they serve some other purpose rather than slot
      information.  Thus, using these bits on POWER7 to adjust the SIAR value results
      in samples being attributed to the wrong instructions.  The attached patch
      changes the oprofile kernel driver to ignore these slot bits on all newer
      processors starting with POWER6.
      Signed-off-by: NMaynard Johnson <maynardj@us.ibm.com>
      Signed-off-by: NMichael Wolf <mjw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e5fc948b
  32. 11 3月, 2009 1 次提交
  33. 10 2月, 2009 1 次提交
  34. 13 1月, 2009 1 次提交
  35. 08 1月, 2009 4 次提交