- 29 12月, 2014 26 次提交
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由 Liad Kaufman 提交于
A new TLV supplies the ADMA address for SDIO mode, allowing the driver to configure the default base address to be this (as given in the FW), rather than hardcoding the values to use until the FW sends the ALIVE message. Use the value given by the FW in the IWL_UCODE_TLV_SDIO_ADMA_ADDR TLV for setting the default SDTM base address until the FW sends the ALIVE message. If it isn't given in the FW - use the current hardcoded values. Signed-off-by: NLiad Kaufman <liad.kaufman@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Johannes Berg 提交于
A number of places (still) use a direct operation, use iwl_mvm_sta_from_mac80211() consistently. In one place also move it into the variable initializer. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Johannes Berg 提交于
There are a few places not using it, use it at those places. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
This device was renamed, but the external definition remained there. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
Some implementations (i.e. mini_rpm) assume the references are managed only while the device is started. Move the stale reference cleanup before stopping the device in order to make them happy. Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Signed-off-by: NGregory Greenman <gregory.greenman@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Julia Lawall 提交于
Convert a call to init_timer and accompanying intializations of the timer's data and function fields to a call to setup_timer. A simplified version of the semantic match that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression t,f,d; @@ -init_timer(&t); +setup_timer(&t,f,d); -t.data = d; -t.function = f; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Julia Lawall 提交于
Convert a call to init_timer and accompanying intializations of the timer's data and function fields to a call to setup_timer. A simplified version of the semantic match that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression t,f,d; @@ -init_timer(&t); +setup_timer(&t,f,d); -t.data = d; -t.function = f; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
The driver and the firmware now support 2 different channels at the same time. Advertise this capability to the stack. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
On hw restart, make sure to wait for d0i3 exit (by checking the IN_D0I3 status bit). This is needed in order to avoid the stale d0i3_exit_work from doing harm (e.g. unref cleared reference). Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Reviewed-by: NGregory Greenman <gregory.greenman@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
Consider the iwlwifi module param d0i3_disable when considering whether d0i3 is supported. (There is currently no need to differentiate between supported and enabled, so keep the function as-is) Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
Enter d0i3 on suspend, and exit d0i3. Wait for the command responses in both cases. Use this mode in case of pcie trans. Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
Allow configuring additional d0i3 mode, in which the fw will be configured to enter d0i3 only on suspend (while keeping the wake_lock accounting as usual) The d0i3 mode to use will be determined by the underlying trans layer. Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
d3 and d0i3 shouldn't be mutually exclusive. Set supported wowlan triggers by looking for each of them, and check on suspend/resume which flow should be used ("any" trigger is supported by d0i3, and all the others by d3) Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eliad Peller 提交于
Implement the ref/unref trans ops and track both tx and host command queues (and hold references while they are not empty). Signed-off-by: NEliad Peller <eliadx.peller@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
This allows to add the offset. The type of the generic memory dump will let the parser know that this is SRAM. Reviewed-by: NLiad Kaufman <liad.kaufman@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
Instead of adding a dump type for each type of memory, change the SMEM type to be a general purpose memory dump. Add the type of the memory and its offset in the device in the dump itself. This will allow an external parser to know where this memory came from. Note that since this type isn't really in use yet, this is not a real problem. Reviewed-by: NLiad Kaufman <liad.kaufman@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Liad Kaufman 提交于
In NICs that have SMEM - add its content to the dump data for later debug. Signed-off-by: NLiad Kaufman <liad.kaufman@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eran Harary 提交于
nvm_file in family 8000 B step and A step differ. This means that the driver should support 2 file name as default. Signed-off-by: NEran Harary <eran.harary@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Eyal Shapira 提交于
In case the rate mask for one of the modulations was zero the max rate idx for that modulation was set to 32 (BITS_PER_LONG). This is bad as it would later lead to an out of bounds access to the expected tpt table. In most cases there was no real effect as the expected tpt was set to 0 and this led to avoiding the modulation effectively. Fix the out of bounds access and explicitly skip the modulation in case there's no rate allowed in it. Signed-off-by: NEyal Shapira <eyalx.shapira@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Luciano Coelho 提交于
Clear the thermal throttling values when entering CT-kill, since everything will be reinitialized anyway when we exit CT-kill. Additionally, clear the dynamic_smps value in the initialization funciton, for consistency. Signed-off-by: NLuciano Coelho <luciano.coelho@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Ido Yariv 提交于
The HW step member was left out of the core dump information. Fix this. Signed-off-by: NIdo Yariv <idox.yariv@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
The firmware is able to compensate the rssi when we hear the frame on a different channel. This is true for an offset up to 3 channels. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
This allows to collect the logs even if the firmware hasn't crashed. Of course, crashing the firmware is an option, but this is easier and nicer. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
When the driver is unload, the Manageability Engine should know about that - send an event to inform it about this event. Reviewed-by: NReuven Borok <reuven.borok@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Moshe Harel 提交于
The antenna configuration has to be read also from OTP Currently read only from FW image Guideline: An antenna exists only if appears both in FW image & NVM Signed-off-by: NMoshe Harel <moshe.harel@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Dor Shaish 提交于
Signed-off-by: NDor Shaish <dor.shaish@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 28 12月, 2014 2 次提交
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由 Liad Kaufman 提交于
The allocation of the DCCM between the data and the stack can theoretically change without notice to the driver, but the total size is HW-fixed. Since the stack CCM (runtime stack) has also data important to the FW - this patch allows pulling the whole DCCM in one piece and adds it to the dump data. If the size isn't known - just use the data part of the DCCM as it appears in the FW TLVs. Signed-off-by: NLiad Kaufman <liad.kaufman@intel.com> Reviewed-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Johannes Berg 提交于
The module version "in-tree:" or "in-tree:d" is useless; there should be better (functional) ways to detect whether debugging is enabled and other than that the version says nothing. Therefore remove the driver version completely. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 12 12月, 2014 12 次提交
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由 Marcelo Leitner 提交于
Currently, when trying to reuse a socket, vxlan_sock_add will grab vn->sock_lock, locate a reusable socket, inc refcount and release vn->sock_lock. But vxlan_sock_release() will first decrement refcount, and then grab that lock. refcnt operations are atomic but as currently we have deferred works which hold vs->refcnt each, this might happen, leading to a use after free (specially after vxlan_igmp_leave): CPU 1 CPU 2 deferred work vxlan_sock_add ... ... spin_lock(&vn->sock_lock) vs = vxlan_find_sock(); vxlan_sock_release dec vs->refcnt, reaches 0 spin_lock(&vn->sock_lock) vxlan_sock_hold(vs), refcnt=1 spin_unlock(&vn->sock_lock) hlist_del_rcu(&vs->hlist); vxlan_notify_del_rx_port(vs) spin_unlock(&vn->sock_lock) So when we look for a reusable socket, we check if it wasn't freed already before reusing it. Signed-off-by: NMarcelo Ricardo Leitner <mleitner@redhat.com> Fixes: 7c47cedf ("vxlan: move IGMP join/leave to work queue") Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Cyrille Pitchen 提交于
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
Add the required firmware commands for A0 steering and a way to enable that. The firmware support focuses on INIT_HCA, QUERY_HCA, QUERY_PORT, QUERY_DEV_CAP and QUERY_FUNC_CAP commands. Those commands are used to configure and query the device. The different A0 DMFS (steering) modes are: Static - optimized performance, but flow steering rules are limited. This mode should be choosed explicitly by the user in order to be used. Dynamic - this mode should be explicitly choosed by the user. In this mode, the FW works in optimized steering mode as long as it can and afterwards automatically drops to classic (full) DMFS. Disable - this mode should be explicitly choosed by the user. The user instructs the system not to use optimized steering, even if the FW supports Dynamic A0 DMFS (and thus will be able to use optimized steering in Default A0 DMFS mode). Default - this mode is implicitly choosed. In this mode, if the FW supports Dynamic A0 DMFS, it'll work in this mode. Otherwise, it'll work at Disable A0 DMFS mode. Under SRIOV configuration, when the A0 steering mode is enabled, older guest VF drivers who aren't using the RX QP allocation flag (MLX4_RESERVE_A0_QP) will get a QP from the general range and fail when attempting to register a steering rule. To avoid that, the PF context behaviour is changed once on A0 static mode, to require support for the allocation flag in VF drivers too. In order to enable A0 steering, we use log_num_mgm_entry_size param. If the value of the parameter is not positive, we treat the absolute value of log_num_mgm_entry_size as a bit field. Setting bit 2 of this bit field enables static A0 steering. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
Currently QUERY_PORT is done as a part of QUERY_DEV_CAP firmware command. Since we would like to use it without querying all device capabilities, extract this part to be a function of its own. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
When a given flow steering rule is invalid in respect to the current steering configuration, print the correct error message to the system log. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
A0 hybrid steering is a form of high performance flow steering. By using this mode, mlx4 cards use a fast limited table based steering, in order to enable fast steering of unicast packets to a QP. In order to implement A0 hybrid steering we allocate resources from different zones: (1) General range (2) Special MAC-assigned QPs [RSS, Raw-Ethernet] each has its own region. When we create a rss QP or a raw ethernet (A0 steerable and BF ready) QP, we try hard to allocate the QP from range (2). Otherwise, we try hard not to allocate from this range. However, when the system is pushed to its limits and one needs every resource, the allocator uses every region it can. Meaning, when we run out of raw-eth qps, the allocator allocates from the general range (and the special-A0 area is no longer active). If we run out of RSS qps, the mechanism tries to allocate from the raw-eth QP zone. If that is also exhausted, the allocator will allocate from the general range (and the A0 region is no longer active). Note that if a raw-eth qp is allocated from the general range, it attempts to allocate the range such that bits 6 and 7 (blueflame bits) in the QP number are not set. When the feature is used in SRIOV, the VF has to notify the PF what kind of QP attributes it needs. In order to do that, along with the "Eth QP blueflame" bit, we reserve a new "A0 steerable QP". According to the combination of these bits, the PF tries to allocate a suitable QP. In order to maintain backward compatibility (with older PFs), the PF notifies which QP attributes it supports via QUERY_FUNC_CAP command. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
The zone allocator is a mechanism which manages a few mlx4_bitmaps. When allocating a resource, the user indicates the desired zone of which this resource will be allocated from. If possible, the resource will be allocated from this zone. Otherwise, the resource will be allocated from a less-than, equal-to, higher-than priority zone, according to the desired zone's properties with that respective allocation order. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Dotan Barak 提交于
The number of reserved QPs is affected both from the firmware and from the driver's requirements. This patch adds a check that validates that this number is indeed feasable. Signed-off-by: NDotan Barak <dotanb@dev.mellanox.co.il> Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Eugenia Emantayev 提交于
When using BF (Blue-Flame), the QPN overrides the VLAN, CV, and SV fields in the WQE. Thus, BF may only be used for QPNs with bits 6,7 unset. The current Ethernet driver code reserves a Tx QP range with 256b alignment. This is wrong because if there are more than 64 Tx QPs in use, QPNs >= base + 65 will have bits 6/7 set. This problem is not specific for the Ethernet driver, any entity that tries to reserve more than 64 BF-enabled QPs should fail. Also, using ranges is not necessary here and is wasteful. The new mechanism introduced here will support reservation for "Eth QPs eligible for BF" for all drivers: bare-metal, multi-PF, and VFs (when hypervisors support WC in VMs). The flow we use is: 1. In mlx4_en, allocate Tx QPs one by one instead of a range allocation, and request "BF enabled QPs" if BF is supported for the function 2. In the ALLOC_RES FW command, change param1 to: a. param1[23:0] - number of QPs b. param1[31-24] - flags controlling QPs reservation Bit 31 refers to Eth blueflame supported QPs. Those QPs must have bits 6 and 7 unset in order to be used in Ethernet. Bits 24-30 of the flags are currently reserved. When a function tries to allocate a QP, it states the required attributes for this QP. Those attributes are considered "best-effort". If an attribute, such as Ethernet BF enabled QP, is a must-have attribute, the function has to check that attribute is supported before trying to do the allocation. In a lower layer of the code, mlx4_qp_reserve_range masks out the bits which are unsupported. If SRIOV is used, the PF validates those attributes and masks out unsupported attributes as well. In order to notify VFs which attributes are supported, the VF uses QUERY_FUNC_CAP command. This command's mailbox is filled by the PF, which notifies which QP allocation attributes it supports. Signed-off-by: NEugenia Emantayev <eugenia@mellanox.co.il> Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Matan Barak 提交于
Previously, we've fired all our completion callbacks straight from our ISR. Some of those callbacks were lightweight (for example, mlx4_en's and IPoIB napi callbacks), but some of them did more work (for example, the user-space RDMA stack uverbs' completion handler). Besides that, doing more than the minimal work in ISR is generally considered wrong, it could even lead to a hard lockup of the system. Since when a lot of completion events are generated by the hardware, the loop over those events could be so long, that we'll get into a hard lockup by the system watchdog. In order to avoid that, add a new way of invoking completion events callbacks. In the interrupt itself, we add the CQs which receive completion event to a per-EQ list and schedule a tasklet. In the tasklet context we loop over all the CQs in the list and invoke the user callback. Signed-off-by: NMatan Barak <matanb@mellanox.com> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Or Gerlitz 提交于
When VFs (guests in this context) issue the QUERY_DEV_CAP command, they need not be told that host side virtualization features such as VST, FSM (MAC anti-spoofing) and running > 80 VFs are supported by the device. Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Or Gerlitz 提交于
This was dropped by mistake for the napi_gro_frags flow, fix that. Fixes: dd65beac ('net/mlx4_en: Extend usage of napi_gro_frags') Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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