- 28 12月, 2016 1 次提交
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由 Javier Martinez Canillas 提交于
Commit 75813028 ("ARM: dts: am4372: Remove skeleton.dtsi usage") removed the skeleton.dtsi usage since we want to get rid of it. But this can cause issues when booting a kernel with a boot-loader that doesn't create a chosen node if this isn't present in the DTB since the decompressor relies on a pre-existing chosen node to be available to insert the command line and merge other ATAGS info. Fixes: 75813028 ("ARM: dts: am4372: Remove skeleton.dtsi usage") Reported-by: NPali Rohar <pali.rohar@gmail.com> Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 11月, 2016 1 次提交
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由 Mugunthan V N 提交于
Add DMA properties for tscadc Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 11月, 2016 1 次提交
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由 Tony Lindgren 提交于
Drivers using pinctrl-single,pins have #pinctrl-cells = <1>, while pinctrl-single,bits need #pinctrl-cells = <2>. Note that this patch can be optionally applied separately from the driver changes as the driver supports also the legacy binding without #pinctrl-cells. Acked-by: NRob Herring <robh@kernel.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 8月, 2016 2 次提交
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由 Javier Martinez Canillas 提交于
This patch fixes the following DTC warnings: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Javier Martinez Canillas 提交于
The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" The disassembled DTB are almost the same besides an empty chosen node being removed and nodes reordered, so it shouldn't have functional changes. Since no am4372 based board had a memory node defined, a dummy node is added so the compiled DTB memory node is the same than before. Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 8月, 2016 1 次提交
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由 Javier Martinez Canillas 提交于
This patch fixes the following DTC warnings for many boards: "Node /ocp has a reg or ranges property, but no unit name" Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 6月, 2016 1 次提交
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由 Grygorii Strashko 提交于
Add "ti,cpsw-mdio" for am335x/am437x/dra7 SoCs where MDIO is implemented as part of TI CPSW and, this way, enable PM runtime auto suspend for Davinci MDIO driver on these paltforms. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 6月, 2016 1 次提交
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由 Lokesh Vutla 提交于
Adding DT node for hardware random number generator. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 6月, 2016 1 次提交
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由 Ivan Khoronzhuk 提交于
There is no reason to hold s/w dependent parameter in device tree. Even more, there is no reason in this parameter because davinici_cpdma driver splits pool of descriptors equally between tx and rx channels anyway. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 6月, 2016 4 次提交
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由 Robert P. J. Day 提交于
Correct misspelling, "emda3" -> "edma3". Reported-by: NAdam J Allison <adamj.allison@gmail.com> Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dave Gerlach 提交于
Add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime. Information from AM437x Data Manual, SPRS851B, Revised April 2015, Table 5-2. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
Previous patches switched the ECAP and EPWM to use the new bindings. These bindings explicitly adds the various required clocks via DT rather than depending on hwmod. Therefore, it is safe to remove the hwmod entries since they are no longer needed. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
Switch to a new ECAP and EPWM bindings that doesn't depend on hwmod to provide the various required clocks. For AM437 and AM335x, add the required clocks explicitly to DT. The hwmod entries for ECAP and EPWM will be removed and this will prevent anything from breaking. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 4月, 2016 1 次提交
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由 Franklin S Cooper Jr 提交于
This patch updates the GPMC's DT DMA property to reflect the updated eDMA bindings. Fixes: cce1ee00 ("ARM: DTS: am437x: Use the new DT bindings for the eDMA3") Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 4月, 2016 2 次提交
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由 Roger Quadros 提交于
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Franklin S Cooper Jr 提交于
When possible generic node names should be used. So change the node name from ehrpwm to pwm. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 3月, 2016 1 次提交
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由 Tero Kristo 提交于
EDMA was allocating DMA channels 32 and 33 for memcpy usage, out of which channel 33 is actually used by DES crypto engine. This bad allocation of the channel causes a crash in the DES crypto engine, as the channel gets configured for memcpy usage instead of hardware <-> memory DMA. Fixed by allocating DMA channels 58 and 59 for memcpy usage (I2C0 RX/TX), which are not used by anybody. Fixes: cce1ee00 ("ARM: DTS: am437x: Use the new DT bindings for the eDMA3") Cc: stable@vger.kernel.org # v4.4+ Signed-off-by: NTero Kristo <t-kristo@ti.com> Suggested-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 27 2月, 2016 1 次提交
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由 Roger Quadros 提交于
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 2月, 2016 1 次提交
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由 Kishon Vijay Abraham I 提交于
Add "syscon-phy-power" property and remove the deprecated "ctrl-module" property from SATA and USB PHY node. Also remove the unused control module dt nodes. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 1月, 2016 1 次提交
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由 Grygorii Strashko 提交于
As per ARM documentation PPI(0) ID27 - global timer interrupt is rising-edge sensitive. PPI(2) ID29 - twd interrupt is rising-edge sensitive. and the same is proved by GIC distributor register value GIC_DIST_CONFIG(0xC04) = 0x7DC00000. Hence, set IRQ triggering type to IRQ_TYPE_EDGE_RISING for ARM TWD and Global timers. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 1月, 2016 1 次提交
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由 Keerthy 提交于
Add ti,mbox-send-noirq to wkup_m3 mailbox so that messages using wkup_m3 mailbox are sent without triggering any further interrupts. This is required to be able to send multiple messages to the WkupM3 after the mailbox usage logic adjustment in the wkup_m3_ipc driver. Signed-off-by: NKeerthy <j-keerthy@ti.com> Acked-by: NDave Gerlach <d-gerlach@ti.com> [s-anna@ti.com: revise commit description] Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 12月, 2015 1 次提交
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由 Vignesh R 提交于
Add qspi memory mapped region entries for AM43xx based SoCs. Also, update the binding documents for the controller to document this change. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NVignesh R <vigneshr@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 12月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and enable the DMA even crossbar with ti,am335x-edma-crossbar. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 12月, 2015 1 次提交
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由 Grygorii Strashko 提交于
ARM TWD and Global timer are clocked by PERIPHCLK which is MPU_CLK/2. But now they are clocked by dpll_mpu_m2_ck == MPU_CLK and, as result. Timekeeping core misbehaves. For example, execution of command "sleep 5" will take 10 sec instead of 5. Hence, fix it by adding mpu_periphclk ("fixed-factor-clock") and use it for clocking ARM TWD and Global timer (same way as on OMAP4). Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Fixes:commit 8cbd4c2f ("arm: boot: dts: am4372: add ARM timers and SCU nodes") Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 12月, 2015 1 次提交
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由 Mugunthan V N 提交于
Set the alias for qspi to spi0 Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 12月, 2015 1 次提交
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由 Franklin S Cooper Jr 提交于
Add dma channel information to the gpmc. Although not enabled by default this will allow prefetch-dma to be used. Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 11月, 2015 1 次提交
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由 Vinod Koul 提交于
This reverts commit e3faf2b8 as it causes regression in BBB Reported-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 27 10月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3 and enable the DMA even crossbar with ti,am335x-edma-crossbar. With the new bindings boards can customize and tweak the DMA channel priority to match their needs. With the new binding the memcpy is safe to be used since with the old binding it was not possible for a driver to know which channel is allowed to be used as non HW triggered channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 22 9月, 2015 1 次提交
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由 Mugunthan V N 提交于
There are 2 MACIDs stored in the control module of the am4372. These are read by the cpsw driver if no valid MACID was found in the devicetree. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 9月, 2015 1 次提交
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由 Keerthy 提交于
rtc can either be supplied from internal 32k clock or external crystal generated 32k clock. Internal clock is SOC specific and the external clock is board dependent. Adding the corresponding nodes. Signed-off-by: NKeerthy <j-keerthy@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 13 8月, 2015 1 次提交
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由 Felipe Balbi 提交于
AM437x devices sport SCU, TWD and Global timers, let's add them to DTS so they have a chance to probe and be used by Linux. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 8月, 2015 1 次提交
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由 Keerthy 提交于
am4372-rtc string was already part of dts, introduced to identify the rtc specific to am4372 family of SoCs. It was removed in one of the previous patches. Adding back the same with appropriate documentation. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 8月, 2015 1 次提交
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由 Keerthy 提交于
Compared to da830-rtc compatibility am3352-rtc is more compatible to the one in am437x. Hence adding the am3352-rtc compatible to cover the entire feature set. The ti,am4372-rtc has no Documentation and not used even in the driver hence removing it. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 05 8月, 2015 1 次提交
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由 Suman Anna 提交于
Add the Wakeup M3 IPC device node for the wkup_m3_ipc driver on AM4372 SoC. This node uses the IPC registers, part of the Control Module, and is therefore added as a child of the scm node. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 8月, 2015 1 次提交
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由 Felipe Balbi 提交于
Add interrupt names so that the same can be used for OTG easily. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 31 7月, 2015 1 次提交
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由 Keerthy 提交于
cpsw needs the clock to be running at 50MHz in kernel. Hence setting the default rate. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 23 7月, 2015 1 次提交
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由 Keerthy 提交于
Add PRCM IRQ entry. This is needed for I/O wakeup support. Signed-off-by: NKeerthy <j-keerthy@ti.com> [paul@pwsan.com: added I/O wakeup note in commit description] Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 21 7月, 2015 1 次提交
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由 Sekhar Nori 提交于
Add serialN aliases for all 6 UART instances on the AM437x SoC so each board's .dts file does not have to define its own aliases. Remove the alias added for am437x-gp-evm.dts now that we have the aliases defined in am4372.dtsi file. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 7月, 2015 1 次提交
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由 Suman Anna 提交于
Add the Wakeup M3 remote processor device node for the AM4372 SoC. The WkupM3 remote processor is used to implement and achieve low-power functionality on the AM33xx & AM43xx SoCs. This node is added as a child of the recently added l4_wkup node to reflect its presence within the SoC. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 7月, 2015 1 次提交
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由 Tomi Valkeinen 提交于
When DSS nodes were added to am4372.dtsi, the rfbi node was not marked as disabled. This should have been done, as the rule of thumb is to disable all DSS nodes that are not used, and especially rfbi, as we don't have a driver for rfbi. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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