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  1. 17 5月, 2016 3 次提交
  3. 18 2月, 2016 1 次提交
  5. 31 10月, 2015 1 次提交
  7. 04 8月, 2015 1 次提交
  9. 04 6月, 2015 1 次提交
  11. 05 5月, 2015 2 次提交
    • J
      thermal: introduce the Power Allocator governor · 6b775e87
      由 Javi Merino 提交于 
      The power allocator governor is a thermal governor that controls system
and device power allocation to control temperature.  Conceptually, the
implementation divides the sustainable power of a thermal zone among
all the heat sources in that zone.

This governor relies on "power actors", entities that represent heat
sources.  They can report current and maximum power consumption and
can set a given maximum power consumption, usually via a cooling
device.

The governor uses a Proportional Integral Derivative (PID) controller
driven by the temperature of the thermal zone.  The output of the
controller is a power budget that is then allocated to each power
actor that can have bearing on the temperature we are trying to
control.  It decides how much power to give each cooling device based
on the performance they are requesting.  The PID controller ensures
that the total power budget does not exceed the control temperature.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: NPunit Agrawal <punit.agrawal@arm.com>
Signed-off-by: NJavi Merino <javi.merino@arm.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      6b775e87
    • I
      thermal: Add QPNP PMIC temperature alarm driver · c610afaa
      由 Ivan T. Ivanov 提交于 
      Add support for the temperature alarm peripheral found inside
Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
peripheral outputs a pulse on an interrupt line whenever the
thermal over temperature stage value changes.

Register a thermal sensor. The temperature reported by this thermal
sensor device should reflect the actual PMIC die temperature if an
ADC is present on the given PMIC. If no ADC is present, then the
reported temperature should be estimated from the over temperature
stage value.

Cc: David Collins <collinsd@codeaurora.org>
Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      c610afaa
  13. 01 5月, 2015 2 次提交
    • O
      thermal: intel Quark SoC X1000 DTS thermal driver · 8c187693
      由 Ong, Boon Leong 提交于 
      In Intel Quark SoC X1000, there is one on-die digital temperature sensor(DTS).
The DTS offers both hot & critical trip points.

However, in current distribution of UEFI BIOS for Quark platform, only
critical trip point is configured to be 105 degree Celsius (based on Quark
SW ver1.0.1 and hot trip point is not used due to lack of IRQ.

There is no active cooling device for Quark SoC, so Quark SoC thermal
management logic expects Linux distro to orderly power-off when temperature
of the DTS exceeds the configured critical trip point.

Kernel param "polling_delay" in milliseconds is used to control the frequency
the DTS temperature is read by thermal framework. It defaults to 2-second.
To change it, use kernel boot param "intel_quark_dts_thermal.polling_delay=X".

User interacts with Quark SoC DTS thermal driver through sysfs via:
/sys/class/thermal/thermal_zone0/

For example:
 - to read DTS temperature
   $ cat temp
 - to read critical trip point
   $ cat trip_point_0_temp
 - to read trip point type
   $ cat trip_point_0_type
 - to emulate temperature raise to test orderly shutdown by Linux distro
   $ echo 105 > emul_temp
Tested-by: NBryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com>
Reviewed-by: NBryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: NKweh, Hock Leong <hock.leong.kweh@intel.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      8c187693
    • S
      Thermal: Intel SoC: DTS thermal IOSF core · ee073604
      由 Srinivas Pandruvada 提交于 
      This is becoming a common feature for Intel SoCs to expose the additional
digital temperature sensors (DTSs) using side band interface (IOSF). This
change remove common IOSF DTS handler function from the existing driver
intel_soc_dts_thermal.c and creates a stand alone module, which can
be selected from the SoC specific drivers. In this way there is less
code duplication.
Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
      ee073604
  15. 25 11月, 2014 1 次提交
  17. 20 11月, 2014 2 次提交
    • M
      thermal: Add Tegra SOCTHERM thermal management driver · 66fb8480
      由 Mikko Perttunen 提交于 
      This adds support for the Tegra SOCTHERM thermal sensing and management
system found in the Tegra124 system-on-chip. This initial driver supports
temperature polling for four thermal zones.
Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      66fb8480
    • E
      thermal: introduce clock cooling device · f9df89d8
      由 Eduardo Valentin 提交于 
      This patch introduces a new thermal cooling device based on common clock
framework. The original motivation to write this cooling device is to be
able to cool down thermal zones using clocks that feed co-processors, such
as GPUs, DSPs, Image Processing Co-processors, etc. But it is written
in a way that it can be used on top of any clock.

The implementation is pretty straight forward. The code creates
a thermal cooling device based on a pair of a struct device and a clock name.
The struct device is assumed to be usable by the OPP layer. The OPP layer
is used as source of the list of possible frequencies. The (cpufreq) frequency
table is then used as a map from frequencies to cooling states. Cooling
states are indexes to the frequency table.

The logic sits on top of common clock framework, specifically on clock
pre notifications. Any PRE_RATE_CHANGE is hijacked, and the transition is
only allowed when the new rate is within the thermal limit (cooling state -> freq).

When a thermal cooling device state transition is requested, the clock
is also checked to verify if the current clock rate is within the new
thermal limit.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Len Brown <len.brown@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-pm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      f9df89d8
  19. 11 10月, 2014 1 次提交
  21. 10 10月, 2014 1 次提交
  23. 27 8月, 2014 1 次提交
    • P
      thermal: Added Bang-bang thermal governor · e4dbf98f
      由 Peter Feuerer 提交于 
      The bang-bang thermal governor uses a hysteresis to switch abruptly on
or off a cooling device.  It is intended to control fans, which can
not be throttled but just switched on or off.
Bang-bang cannot be set as default governor as it is intended for
special devices only.  For those special devices the driver needs to
explicitely request it.

Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Andreas Mohr <andi@lisas.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Javi Merino <javi.merino@arm.com>
Cc: linux-pm@vger.kernel.org
Signed-off-by: NPeter Feuerer <peter@piie.net>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      e4dbf98f
  25. 15 7月, 2014 1 次提交
  27. 15 5月, 2014 1 次提交
    • S
      thermal: Intel SoC DTS thermal · bc40b5e3
      由 Srinivas Pandruvada 提交于 
      In the Intel SoCs like Bay Trail, there are 2 additional digital temperature
sensors(DTS), in addition to the standard DTSs in the core. Also they support
4 programmable thresholds, out of which two can be used by OSPM. These
thresholds can be used by OSPM thermal control. Out of these two thresholds,
one is used by driver and one user mode can change via thermal sysfs to get
notifications on threshold violations.

The driver defines one critical trip points, which is set to TJ MAX - offset.
The offset can be changed via module parameter (default 5C). Also it uses
one of the thresholds to get notification for this temperature violation.
This is very important for orderly shutdown as the many of these devices don't
have ACPI thermal zone, and expects that there is some other thermal control
mechanism present in OSPM. When a Linux distro is used without additional
specialized thermal control program, BIOS can do force shutdown when thermals
are not under control. When temperature reaches critical, the Linux thermal
core will initiate an orderly shutdown.
Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      bc40b5e3
  29. 02 1月, 2014 1 次提交
  31. 04 12月, 2013 1 次提交
    • E
      thermal: introduce device tree parser · 4e5e4705
      由 Eduardo Valentin 提交于 
      This patch introduces a device tree bindings for
describing the hardware thermal behavior and limits.
Also a parser to read and interpret the data and feed
it in the thermal framework is presented.

This patch introduces a thermal data parser for device
tree. The parsed data is used to build thermal zones
and thermal binding parameters. The output data
can then be used to deploy thermal policies.

This patch adds also documentation regarding this
API and how to define tree nodes to use
this infrastructure.

Note that, in order to be able to have control
on the sensor registration on the DT thermal zone,
it was required to allow changing the thermal zone
.get_temp callback. For this reason, this patch
also removes the 'const' modifier from the .ops
field of thermal zone devices.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      4e5e4705
  33. 03 9月, 2013 1 次提交
    • E
      thermal: hwmon: move hwmon support to single file · 0dd88793
      由 Eduardo Valentin 提交于 
      In order to improve code organization, this patch
moves the hwmon sysfs support to a file named
thermal_hwmon. This helps to add extra support
for hwmon without scrambling the code.

In order to do this move, the hwmon list head is now
using its own locking. Before, the list used
the global thermal locking. Also, some minor changes
in the code were required, as recommended by checkpatch.pl.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: NDurgadoss R <durgadoss.r@intel.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      0dd88793
  35. 13 8月, 2013 2 次提交
  37. 18 6月, 2013 1 次提交
  39. 28 5月, 2013 1 次提交
    • E
      thermal: introduce TI SoC thermal driver · eb982001
      由 Eduardo Valentin 提交于 
      This patch moves the ti-soc-thermal driver out of
the staging tree to the thermal tree.

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: J Keerthy <j-keerthy@ti.com>
Cc: Radhesh Fadnis <radhesh.fadnis@ti.com>
Cc: Cyril Roelandt <tipecaml@gmail.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Cc: linux-pm@vger.kernel.org
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      eb982001
  41. 14 4月, 2013 3 次提交
  43. 02 4月, 2013 1 次提交
    • E
      thermal: Add driver for Armada 370/XP SoC thermal management · fa0d654c
      由 Ezequiel Garcia 提交于 
      This driver supports both Armada 370 and Armada XP SoC
thermal management controllers.

Armada 370 has a register to check a valid temperature, whereas
Armada XP does not. Each has a different initialization (i.e. calibration)
function. The temperature conversion formula is the same for both.

The controller present in each SoC have a very similar feature set,
so it corresponds to have one driver to support both of them.

Although this driver may present similarities to Dove and Kirkwood
thermal driver, the exact differences and coincidences are not fully
known. For this reason, support is given through a separate driver.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      fa0d654c
  45. 08 2月, 2013 3 次提交
  47. 06 2月, 2013 1 次提交
  49. 15 11月, 2012 2 次提交
  51. 05 11月, 2012 3 次提交
  53. 24 9月, 2012 1 次提交