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  1. 21 10月, 2015 1 次提交
  3. 01 10月, 2015 2 次提交
  5. 06 7月, 2015 1 次提交
  7. 08 4月, 2015 3 次提交
  9. 29 10月, 2014 1 次提交
    • H
      [media] v4l2-ctrls: fix sparse warning · 7a7f1ab3
      由 Hans Verkuil 提交于 
      The warning is simple:

drivers/media/v4l2-core/v4l2-ctrls.c:1685:15: warning: incorrect type in assignment (different address spaces)

but the fix isn't.

The core problem was that the conversion from user to kernelspace was
done at too low a level and that needed to be moved up. That made it possible
to drop pointers to v4l2_ext_control from set_ctrl and validate_new and
clean up this sparse warning because those functions now always operate
on kernelspace pointers.
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
      7a7f1ab3
  11. 22 9月, 2014 1 次提交
  13. 22 8月, 2014 1 次提交
  15. 28 7月, 2014 1 次提交
    • H
      [media] v4l2-ctrls: fix rounding calculation · 9c9cb1fa
      由 Hans Verkuil 提交于 
      Commit 958c7c7e ("[media] v4l2-ctrls: fix corner case in round-to-range code") broke
controls that use a negative range.

The cause was a s32/u32 mixup: ctrl->step is unsigned while all others are signed. So
the result type of the expression '(ctrl)->maximum - ((ctrl)->step / 2)' became unsigned,
making 'val >= (ctrl)->maximum - ((ctrl)->step / 2)' true, since '((u32)-128) > 128'
(if val = -128, maximum = 128 and step = 1).

So carefully cast (step / 2) to s32.

There was one cast of step to s32 where it should have been u32 because both offset and
step are unsigned, so casting to signed makes no sense there. You do need a cast to u32
there, because otherwise architectures that have no 64-bit division start complaining
(step is a u64).
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Reported-by: NFrank Schäfer <fschaefer.oss@googlemail.com>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
      9c9cb1fa
  17. 26 7月, 2014 3 次提交
  19. 22 7月, 2014 3 次提交
  21. 17 7月, 2014 17 次提交
  23. 13 3月, 2014 2 次提交
    • A
      [media] v4l: add control for RF tuner PLL lock flag · 9aa4357e
      由 Antti Palosaari 提交于 
      Add volatile boolean control to indicate if tuner frequency synthesizer
is locked to requested frequency. That means tuner is able to receive
given frequency. Control is named as "PLL lock", since frequency
synthesizers are based of phase-locked-loop. Maybe more general name
could be wise still?

Cc: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: NAntti Palosaari <crope@iki.fi>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
      9aa4357e
    • A
      [media] v4l: add RF tuner channel bandwidth control · 3ce569fd
      由 Antti Palosaari 提交于 
      Modern silicon RF tuners has one or more adjustable filters on
signal path, in order to filter noise from desired radio channel.

Add channel bandwidth control to tell the driver which is radio
channel width we want receive. Filters could be then adjusted by
the driver or hardware, using RF frequency and channel bandwidth
as a base of filter calculations.

On automatic mode (normal mode), bandwidth is calculated from sampling
rate or tuning info got from userspace. That new control gives
possibility to set manual mode and let user have more control for
filters.

Cc: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: NAntti Palosaari <crope@iki.fi>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
      3ce569fd
  25. 11 3月, 2014 1 次提交
  27. 06 3月, 2014 1 次提交
    • A
      [media] v4l: add RF tuner gain controls · 80807fad
      由 Antti Palosaari 提交于 
      Modern silicon RF tuners used nowadays has many controllable gain
stages on signal path. Usually, but not always, there is at least
3 gain stages. Also on some cases there could be multiple gain
stages within the ones specified here. However, I think that having
these three controllable gain stages offers enough fine-tuning for
real use cases.

1) LNA gain. That is first gain just after antenna input.
2) Mixer gain. It is located quite middle of the signal path, where
RF signal is down-converted to IF/BB.
3) IF gain. That is last gain in order to adjust output signal level
to optimal level for receiving party (usually demodulator ADC).

Each gain stage could be set rather often both manual or automatic
(AGC) mode. Due to that add separate controls for controlling
operation mode.
Signed-off-by: NAntti Palosaari <crope@iki.fi>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
      80807fad
  29. 01 3月, 2014 1 次提交
  31. 13 1月, 2014 1 次提交