- 26 1月, 2012 1 次提交
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由 Rob Herring 提交于
Remove NR_IRQS and add a per machine .nr_irqs setting. Clean-up namespace replacing usage of IRQ_BOARD_START with MMP_NR_IRQS. Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 21 1月, 2012 1 次提交
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由 Nicolas Pitre 提交于
When this is the only content remaining in mach/system.h then the whole file is removed. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NDavid Brown <davidb@codeaurora.org> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 1月, 2012 2 次提交
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由 Russell King 提交于
Remove the now empty arch_reset() from all the mach/system.h includes, and remove its callsite. Remove arm_machine_restart() as this function no longer does anything useful. For samsung platforms, remove the include of mach/system-reset.h and plat/system-reset.h from their respective mach/system.h headers as these just define their arch_reset functions. As a result, the s3c2410 and plat-samsung system-reset.h files are no longer referenced, so remove these files entirely. Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Hook the Shark restart code into the new restart hook rather than using arch_reset(). Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 12月, 2011 1 次提交
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由 Marc Zyngier 提交于
sched_clock() is yet another blocker on the road to the single image. This patch implements an idea by Russell King: http://www.spinics.net/lists/linux-omap/msg49561.html Instead of asking the platform to implement both sched_clock() itself and the rollover callback, simply register a read() function, and let the ARM code care about sched_clock() itself, the conversion to ns and the rollover. sched_clock() uses this read() function as an indirection to the platform code. If the platform doesn't provide a read(), the code falls back to the jiffy counter (just like the default sched_clock). This allow some simplifications and possibly some footprint gain when multiple platforms are compiled in. Among the drawbacks, the removal of the *_fixed_sched_clock optimization which could negatively impact some platforms (sa1100, tegra, versatile and omap). Tested on 11MPCore, OMAP4 and Tegra. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Colin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Olof Johansson <olof@lixom.net> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Ben Dooks <ben-linux@fluff.org> Tested-by: NJamie Iles <jamie@jamieiles.com> Tested-by: NTony Lindgren <tony@atomide.com> Tested-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NKrzysztof Halasa <khc@pm.waw.pl> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 11月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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- 21 11月, 2011 1 次提交
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由 Russell King 提交于
We only need to set the system up for a soft-restart if we're going to be doing a soft-restart. Provide a new function (soft_restart()) which does the setup and final call for this, and make platforms use it. Eliminate the call to setup_restart() from the default handler. This means that platforms arch_reset() function is no longer called with the page tables prepared for a soft-restart, and caches will still be enabled. Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NWill Deacon <will.deacon@arm.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NKrzysztof Ha■asa <khc@pm.waw.pl> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NRichard Purdie <richard.purdie@linuxfoundation.org> Acked-by: NWan ZongShun <mcuos.com@gmail.com> Acked-by: NEric Miao <eric.y.miao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 11月, 2011 1 次提交
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由 Eric Miao 提交于
There is no SSP0, but SSP1 is used on gplugd as an I2S port. Acked-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 15 11月, 2011 2 次提交
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由 Haojian Zhuang 提交于
Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x. So use dummy clk instead. And move the gpio edge initialization into gpio driver for arch-mmp. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
Remove most gpio macros and change gpio driver to platform driver. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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- 14 11月, 2011 3 次提交
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由 Haojian Zhuang 提交于
NR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
Avoid to define gpio_to_irq() and irq_to_gpio() for potential name confliction since multiple architecture will be built together. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
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由 Haojian Zhuang 提交于
Parameters of GPIO_REG() should be assigned as volatile. arch/arm/plat-pxa/include/plat/gpio.h: In function ‘gpio_get_value’: arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ‘void *’ and ‘int’) arch/arm/plat-pxa/include/plat/gpio.h: In function ‘gpio_set_value’: arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignment arch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignment Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 25 10月, 2011 4 次提交
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由 Leo Yan 提交于
MMP2 have the internal sram, this sram can be allocated for video, power management and secure processor. Now the sram usage is: 0xd1000000 ~ 0xd101ffff (128KB) : reserved for secure processor 0xd1020000 ~ 0xd1037fff (96KB) : for video and PM Register the internal sram's second half 96KB buffer, so that video and PM can dynamically alloc/free from it. Signed-off-by: NLeo Yan <leoy@marvell.com> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Leo Yan 提交于
MMP platform has sram for the audio island; Add the device structure for the audio sram, and register the audio sram device at init phase. Signed-off-by: NLeo Yan <leoy@marvell.com> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Leo Yan 提交于
On mmp platform, there have two sram banks: audio sram and internal sram. The audio sram is mainly for audio; the internal sram is for video, wtm and power management. So add the sram allocator using genalloc to manage them. Every sram bank will register its own platform device info, after the sram allocator create the generic pool for the sram bank, the user module can use the pool's name to get the pool handler; then it can use the handler to alloc/free memory with genalloc APIs. Signed-off-by: NLeo Yan <leoy@marvell.com> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Eric Miao 提交于
GuruPlugD was initially named to be SHEEVAD, and it's causing naming confusion in the mach-types database. Make it consistent by renaming to GPLUGD. Reported-and-Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 17 10月, 2011 2 次提交
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由 Sascha Hauer 提交于
Boards used to specify zreladdr in their Makefile.boot with zreladdr-y := x, so conflicting zreladdrs were silently overwritten. This patch changes this to zreladdr-y += x, so that we end up with multiple words in zreladdr in such a case. We can detect this later and complain if necessary. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
With d8ecc5cd (kbuild: asm-generic support, 2011-04-27) we can remove a handful of asm-generic wrappers in ARM code. Since the generic version of sizes.h doesn't contain SZ_48M, we replace the 4 users of SZ_48M with the equivalent SZ_32M + SZ_16M. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Imre Kaloz <kaloz@openwrt.org> Acked-by: NKrzysztof Halasa <khc@pm.waw.pl> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 10月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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- 08 10月, 2011 1 次提交
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由 Arnd Bergmann 提交于
This tries to clear up the confusion between integers and iomem pointers in the marvell pxa platform. MMIO addresses are supposed to be __iomem* values, in order to let the Linux type checking work correctly. This patch moves the cast to __iomem as far back as possible, to the place where the MMIO virtual address windows are defined. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 02 10月, 2011 1 次提交
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由 Linus Walleij 提交于
The <mach/gpio.h> file is included from upper directories and deal with generic GPIO and gpiolib stuff. Break out the platform and driver specific defines and functions into its own header file. Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 9月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: Nnicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NKevin Hilman <khilman@ti.com>
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- 11 9月, 2011 1 次提交
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由 Lei Wen 提交于
Current pxa3xx_nand controller has two chip select which both be workable. This patch enable this feature. Update platform driver to support this feature. Another notice should be taken that: When you want to use this feature, you should not enable the keep configuration feature, for two chip select could be attached with different nand chip. The different page size and timing requirement make the keep configuration impossible. Signed-off-by: NLei Wen <leiwen@marvell.com>
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- 23 8月, 2011 1 次提交
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由 Tanmay Upadhyay 提交于
- Add EHCI Host controller driver - Add wrapper that creates resources for host controller driver v2 - Call clk_put() after clk_disable() in probe function Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 11 8月, 2011 5 次提交
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由 Lennert Buytenhek 提交于
Instead of setting up a match interrupt for 'current_time + delta' on ->set_next_event(), program timer 0 to count down from 'delta - 1' and trigger an interrupt when it reaches zero. Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Lennert Buytenhek 提交于
Currently, arch-mmp/time.c uses timer 0 both as a clocksource timer and as a clockevent timer, the latter by setting up a comparator interrupt to match on 'current_time + delta'. This is problematic if delta is small enough, as that can lead to 'current_time + delta' already being in the past when comparator setup has finished, leading to the requested event not triggering. As there is also a silicon issue that requires stopping a timer's counter while writing to one of its match registers, we'll switch to using two separate timers -- timer 0 as clockevent timer, which we'll start and stop on every invocation of ->set_next_event(), and timer 1 as clocksource timer, which will be free-running. This first patch enables timer 1 on boot, so that we can use it as clocksource timer. Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Move definitions from mfp-gplugd.h to mfp-pxa168.h as they aren't gplugD specific. Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 08 8月, 2011 1 次提交
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由 Russell King 提交于
Convert arch/arm includes of mach/gpio.h and asm/gpio.h to linux/gpio.h before we start consolidating the individual platform implementations of the gpio header files. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 7月, 2011 2 次提交
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由 Zhangfei Gao 提交于
As suggested by Arnd, move platform data to include/linux/platform_data in order to improve build coverage for the driver. Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Zhangfei Gao 提交于
Update MMP2 platform code to "sdhci-pxav3", following the driver rename. Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com> Acked-by: NPhilip Rakity <prakity@marvell.com> Acked-by: NMark F. Brown <mark.brown314@gmail.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 20 7月, 2011 1 次提交
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由 Kyungmin Park 提交于
Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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- 12 7月, 2011 5 次提交
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由 Haojian Zhuang 提交于
Support max7312 gpio expander in TTC DKB. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Tested UART console, Ethernet & I2C interfaces Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Add wrapper that creates resources for PXA168 Ethernet driver Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
PXA168 has 3 onchip UARTs. Added support for the third one Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
Since there're mulitple clock rates in some device controllers, enable clk_set_rate() for this usage. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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- 06 7月, 2011 1 次提交
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由 Lei Wen 提交于
The original pair of <0x01db, 208000000> is invalid. Correct it to the valid value. The 6th bit of the NFC APMU register indicates NFC works whether at 156Mhz or 78Mhz. So 0x19b indicates NFC works at 156Mhz, and 0x1db indicates it works at 78Mhz. Signed-off-by: NLei Wen <leiwen@marvell.com> Cc: stable@kernel.org Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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