- 14 11月, 2013 7 次提交
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由 Kees Cook 提交于
Given recent discussions about the lack of OABI in the wild, switch CONFIG_OABI_COMPAT to off-by-default to encourage more system builders to avoid it. Signed-off-by: NKees Cook <keescook@chromium.org> Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mahesh Sivasubramanian 提交于
LPAE enabled kernels use the 64-bit version of TTBR0 and TTBR1 registers. If we're running an LPAE kernel, fill the upper half of TTBR0 with 0 because we're setting it to the idmap here (the idmap is guaranteed to be < 4Gb) and fully restore TTBR1 instead of just restoring the lower 32 bits. Failure to do so can cause failures on resume from suspend when these registers are only half restored. Signed-off-by: NMahesh Sivasubramanian <msivasub@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Michal Simek 提交于
ECC policy can be applied to the whole system when this bit is implemented by SoC vendor (IMP - bit 9 - in L1 page table entry format). When this bit is not implemented by SoC vendor it doesn't mean that system has no other way how to do ECC. This patch ensures to show this message only when ECC is requested via cmd line ecc=on and runs on appropriate ARM core. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Victor Kamensky 提交于
Fix patching code to convert mov instruction into mvn instruction in case of CONFIG_ARCH_PHYS_ADDR_T_64BIT and CONFIG_ARM_PATCH_PHYS_VIRT. In BE case store into r0 proper bits so byte swapped instruction could be modified correctly. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Reviewed-by: NR Sricharan <r.sricharan@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Victor Kamensky 提交于
Make sure that inline assembler that expects 'r' operand receives 32 bit value. Before this fix in case of CONFIG_ARCH_PHYS_ADDR_T_64BIT and CONFIG_ARM_PATCH_PHYS_VIRT __phys_to_virt function passed 64 bit value to __pv_stub inline assembler where 'r' operand is expected. Compiler behavior in such case is not well specified. It worked in little endian case, but in big endian case incorrect code was generated, where compiler confused which part of 64 bit value it needed to modify. For example BE snippet looked like this: N:0x80904E08 : MOV r2,#0 N:0x80904E0C : SUB r2,r2,#0x81000000 when LE similar code looked like this N:0x808FCE2C : MOV r2,r0 N:0x808FCE30 : SUB r2,r2,#0xc0, 8 ; #0xc0000000 Note 'r0' register is va that have to be translated into phys To avoid this situation use explicit cast to 'unsigned long', which explicitly discard upper part of phys address and convert value to 32 bit. Also add comment so such cast will not be removed in the future. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Victor Kamensky 提交于
Commit "bc41b872 ARM: 7846/1: Update SMP_ON_UP code to detect A9MPCore with 1 CPU devices" added read of SCU config register into __fixup_smp function. Such read should be followed by byteswap, if kernel runs in BE mode. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The 0-day kernel build robot found this new warning: arch/arm/mm/nommu.c:303:17: warning: 'struct proc_info_list' declared inside parameter list [enabled by default] arch/arm/mm/nommu.c:303:17: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Fix it by including the appropriate header. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 11月, 2013 2 次提交
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由 Nicolin Chen 提交于
Since gen_pool_dma_alloc() is introduced, we implement it to simplify code. Signed-off-by: NNicolin Chen <b42378@freescale.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Jianguo Wu 提交于
Use more appropriate NUMA_NO_NODE instead of -1 in all archs' module_alloc() Signed-off-by: NJianguo Wu <wujianguo@huawei.com> Acked-by: NDavid Rientjes <rientjes@google.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 09 11月, 2013 4 次提交
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由 Chen Gang 提交于
In current kernel wide source code, except other architectures, only s390 scsi drivers use atomic_clear_mask(), and arm/arm64 need not support s390 drivers. So remove atomic_clear_mask() from "arm[64]/include/asm/atomic.h". Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Chen Gang 提交于
For atomic_cmpxchg(), the type of 'oldval' need be 'int' to match the type of "*ptr" (used by 'ldrex' instruction) and 'old' (used by 'teq' instruction). Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Chen Gang 提交于
atomic* value is signed value, and atomic* functions need also process signed value (parameter value, and return value), so 32-bit arm need use 'long long' instead of 'u64'. After replacement, it will also fix a bug for atomic64_add_negative(): "u64 is never less than 0". The modifications are: in vim, use "1,% s/\<u64\>/long long/g" command. remove '__aligned(8)' which is useless for 64-bit. be sure of 80 column limitation after replacement. Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Stephen Boyd 提交于
If we're running a kernel compiled with SMP_ON_UP=y and the hardware only supports UP operation there isn't any smp_cross_call function assigned. Unfortunately, we call smp_cross_call() unconditionally in arch_irq_work_raise() and crash the kernel on UP devices. Check to make sure we're running on an SMP device before calling smp_cross_call() here. Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0004000 [00000000] *pgd=00000000 Internal error: Oops: 80000005 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.12.0-rc6-00018-g8d451442-dirty #16 task: de05b440 ti: de05c000 task.ti: de05c000 PC is at 0x0 LR is at arch_irq_work_raise+0x3c/0x48 pc : [<00000000>] lr : [<c0019590>] psr: 60000193 sp : de05dd60 ip : 00000001 fp : 00000000 r10: c085e2f0 r9 : de05c000 r8 : c07be0a4 r7 : de05c000 r6 : de05c000 r5 : c07c5778 r4 : c0824554 r3 : 00000000 r2 : 00000000 r1 : 00000006 r0 : c0529a58 Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 80004019 DAC: 00000017 Process swapper/0 (pid: 1, stack limit = 0xde05c248) Stack: (0xde05dd60 to 0xde05e000) dd60: c07b9dbc c00cb2dc 00000001 c08242c0 c08242c0 60000113 c07be0a8 c00b0590 dd80: de05c000 c085e2f0 c08242c0 c08242c0 c1414c28 c00b07cc de05b440 c1414c28 dda0: c08242c0 c00b0af8 c0862bb0 c0862db0 c1414cd8 de05c028 c0824840 de05ddb8 ddc0: 00000000 00000009 00000001 00000024 c07be0a8 c07be0a4 de05c000 c085e2f0 dde0: 00000000 c004a4b0 00000010 de00d2dc 00000054 00000100 00000024 00000000 de00: de05c028 0000000a ffff8ae7 00200040 00000016 de05c000 60000193 de05c000 de20: 00000054 00000000 00000000 00000000 00000000 c004a704 00000000 de05c008 de40: c07ba254 c004aa1c c07c5778 c0014b70 fa200000 00000054 de05de80 c0861244 de60: 00000000 c0008634 de05b440 c051c778 20000113 ffffffff de05deb4 c051d0a4 de80: 00000001 00000001 00000000 de05b440 c082afac de057ac0 de057ac0 de0443c0 dea0: 00000000 00000000 00000000 00000000 c082afbc de05dec8 c009f2a0 c051c778 dec0: 20000113 ffffffff 00000000 c016edb0 00000000 000002b0 de057ac0 de057ac0 dee0: 00000000 c016ee40 c0875e50 de05df2e de057ac0 00000000 00000013 00000000 df00: 00000000 c016f054 de043600 de0443c0 c008eb38 de004ec0 c0875e50 c008eb44 df20: 00000012 00000000 00000000 3931f0f8 00000000 00000000 00000014 c0822e84 df40: 00000000 c008ed2c 00000000 00000000 00000000 c07b7490 c07b7490 c075ab3c df60: 00000000 c00701ac 00000002 00000000 c0070160 dffadb73 7bf8edb4 00000000 df80: c051092c 00000000 00000000 00000000 00000000 00000000 00000000 c0510934 dfa0: de05aa40 00000000 c051092c c0013ce8 00000000 00000000 00000000 00000000 dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 07efffe5 4dfac6f5 [<c0019590>] (arch_irq_work_raise+0x3c/0x48) from [<c00cb2dc>] (irq_work_queue+0xe4/0xf8) [<c00cb2dc>] (irq_work_queue+0xe4/0xf8) from [<c00b0590>] (rcu_accelerate_cbs+0x1d4/0x1d8) [<c00b0590>] (rcu_accelerate_cbs+0x1d4/0x1d8) from [<c00b07cc>] (rcu_start_gp+0x34/0x48) [<c00b07cc>] (rcu_start_gp+0x34/0x48) from [<c00b0af8>] (rcu_process_callbacks+0x318/0x608) [<c00b0af8>] (rcu_process_callbacks+0x318/0x608) from [<c004a4b0>] (__do_softirq+0x114/0x2a0) [<c004a4b0>] (__do_softirq+0x114/0x2a0) from [<c004a704>] (do_softirq+0x6c/0x74) [<c004a704>] (do_softirq+0x6c/0x74) from [<c004aa1c>] (irq_exit+0xac/0x100) [<c004aa1c>] (irq_exit+0xac/0x100) from [<c0014b70>] (handle_IRQ+0x54/0xb4) [<c0014b70>] (handle_IRQ+0x54/0xb4) from [<c0008634>] (omap3_intc_handle_irq+0x60/0x74) [<c0008634>] (omap3_intc_handle_irq+0x60/0x74) from [<c051d0a4>] (__irq_svc+0x44/0x5c) Exception stack(0xde05de80 to 0xde05dec8) de80: 00000001 00000001 00000000 de05b440 c082afac de057ac0 de057ac0 de0443c0 dea0: 00000000 00000000 00000000 00000000 c082afbc de05dec8 c009f2a0 c051c778 dec0: 20000113 ffffffff [<c051d0a4>] (__irq_svc+0x44/0x5c) from [<c051c778>] (_raw_spin_unlock_irq+0x28/0x2c) [<c051c778>] (_raw_spin_unlock_irq+0x28/0x2c) from [<c016edb0>] (proc_alloc_inum+0x30/0xa8) [<c016edb0>] (proc_alloc_inum+0x30/0xa8) from [<c016ee40>] (proc_register+0x18/0x130) [<c016ee40>] (proc_register+0x18/0x130) from [<c016f054>] (proc_mkdir_data+0x44/0x6c) [<c016f054>] (proc_mkdir_data+0x44/0x6c) from [<c008eb44>] (register_irq_proc+0x6c/0x128) [<c008eb44>] (register_irq_proc+0x6c/0x128) from [<c008ed2c>] (init_irq_proc+0x74/0xb0) [<c008ed2c>] (init_irq_proc+0x74/0xb0) from [<c075ab3c>] (kernel_init_freeable+0x84/0x1c8) [<c075ab3c>] (kernel_init_freeable+0x84/0x1c8) from [<c0510934>] (kernel_init+0x8/0x150) [<c0510934>] (kernel_init+0x8/0x150) from [<c0013ce8>] (ret_from_fork+0x14/0x2c) Code: bad PC value Fixes: bf18525f "ARM: 7872/1: Support arch_irq_work_raise() via self IPIs" Reported-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Tested-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 11月, 2013 6 次提交
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由 Axel Lin 提交于
This patch converts irq-bcm2835 driver to use the new IRQCHIP_DECLARE and irqchip_init. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Tested-by: NStephen Warren <swarren@wwwdotorg.org> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Stephen Boyd 提交于
By default, IRQ work is run from the tick interrupt (see irq_work_run() in update_process_times()). When we're in full NOHZ mode, restarting the tick requires the use of IRQ work and if the only place we run IRQ work is in the tick interrupt we have an unbreakable cycle. Implement arch_irq_work_raise() via self IPIs to break this cycle and get the tick started again. Note that we implement this via IPIs which are only available on SMP builds. This shouldn't be a problem because full NOHZ is only supported on SMP builds anyway. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NKevin Hilman <khilman@linaro.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 T.J. Purtell 提交于
The ARM architecture reference specifies that the IT state bits in the PSR must be all zeros in ARM mode or behavior is unspecified. On the Qualcomm Snapdragon S4/Krait architecture CPUs the processor continues to consider the IT state bits while in ARM mode. This makes it so that some instructions are skipped by the CPU. Signed-off-by: NT.J. Purtell <tj@mobisocial.us> [rmk+kernel@arm.linux.org.uk: fixed whitespace formatting in patch] Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Thierry Reding 提交于
No-MMU configurations currenty fail to build because they are missing the early_paging_init() symbol. Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Marc Zyngier 提交于
The exception handling code fails to clear the IT state, potentially leading to incorrect execution of the fixup if the size of the IT block is more than one. Let fixup_exception do the IT sanitizing if a fixup has been found, and restore CPSR from the stack when returning from a data abort. Cc: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Tushar Behera 提交于
Commit 6dedcca6 ("hotplug, powerpc, x86: Remove cpu_hotplug_driver_lock())" removes the the definition of cpu_hotplug_driver_{lock,unlock} APIs, thereby causing a build error. Replace these calls with {lock,unlock}_device_hotplug(). Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 11月, 2013 1 次提交
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由 Grant Likely 提交于
Commit 23616132, "of/irq: Refactor interrupt-map parsing" introduced a bug. The irq parsing will fail for some nodes that don't have a reg property. It is fixed by deferring the check for reg until it is actually needed. Also adjust the testcase data to catch the bug. Signed-off-by: NGrant Likely <grant.likely@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Tested-by: NMing Lei <tom.leiming@gmail.com> Tested-by: NStephen Warren <swarren@nvidia.com> Cc: Rob Herring <rob.herring@calxeda.com>
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- 01 11月, 2013 5 次提交
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由 Matt Porter 提交于
Trivial patch to make use of GIC/IRQ defines on the bcm11351 sdio interrupt properties. Signed-off-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Tim Kryger 提交于
This adds in three more UARTs that were not declared earlier. Signed-off-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Register GPIO 14 as card detect interrupt for the SD card slot. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Christian Daudt 提交于
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs. In order to allow other Broadcom SoCs to also use mach-bcm directory and files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Add the GPIO controller device node for the Broadcom bcm281xx family of mobile SoCs. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 10月, 2013 8 次提交
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由 Arnaud Ebalard 提交于
Main hardware parts of the (Armada 370 based) NETGEAR ReadyNAS 104 are supported by mainline kernel (USB 3.0 rear ports, USB 2.0 front port, Gigabit controller and PHYs, serial port, LEDs, buttons, SATA ports, G762 fan controller) and referenced in provided .dts file. Some additonal work remains for: - Intersil ISL12057 I2C RTC and Alarm chip: working driver but needs to be splitted for submission of RTC part first; - Front LCD (Winstar 1602G): driver needs to be written - Armada NAND controller (to access onboard 128MB of NAND): support being pushed by @free-electrons people - 4 front SATA LEDs controlled via GPIO brought by NXP PCA9554: driver is available upstream. Not referenced/tested yet. but the device is usable w/o those. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Santosh Shilimkar 提交于
Most of the kernel code assumes that max*pfn is maximum pfns because the physical start of memory is expected to be PFN0. Since this assumption is not true on ARM architectures, the meaning of max*pfn is number of memory pages. This is done to keep drivers happy which are making use of of these variable to calculate the dma bounce limit using dma_mask. Now since we have a architecture override possibility for DMAable maximum pfns, lets make meaning of max*pfns as maximum pnfs on ARM as well. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We need to start treating DMA masks as something which is specific to the bus that the device resides on, otherwise we're going to hit all sorts of nasty issues with LPAE and 32-bit DMA controllers in >32-bit systems, where memory is offset from PFN 0. In order to start doing this, we convert the DMA mask to a PFN using the device specific dma_to_pfn() macro. This is the reverse of the pfn_to_dma() macro which is used to get the DMA address for the device. This gives us a PFN mask, which we can then check against the PFN limit of the DMA zone. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
arch/arm/mach-footbridge/netwinder-hw.c:695:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type arch/arm/mach-footbridge/netwinder-hw.c:702:2: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type arch/arm/mach-footbridge/netwinder-hw.c:712:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type arch/arm/mach-footbridge/netwinder-hw.c:714:2: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Christian Daudt 提交于
This patch (re)adds ARCH_BCM_MOBILE option to bcm_defconfig which was accidentally removed by commit 2d58b265 ('ARM: bcm_defconfig: Run "make savedefconfig"') Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Hiroshi Doyu 提交于
The IOMMU node's reg property contains completely bogus values! Somehow, this had no practical effect, despite the fact the IOMMU driver appears to be writing to those registers. I suppose that since no HW modules is actually at that address, the writes simply had no effect. Note that I'm not CCing stable here, even though the problem exists as far back as v3.9, simply because this patch doesn't fix any observed issue, and I don't want to run the risk of suddenly writing to some registers and causing a regression. Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> [swarren, wrote commit description] Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Yuanyuan Zhong 提交于
The CPU_DYING notifier is called by cpu stopper task which does not own the context held in the VFP hardware. Calling vfp_force_reload() has no effect. Replace it with clearing vfp_current_hw_state. Signed-off-by: NYuanyuan Zhong <zyy@motorola.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Thomas Petazzoni 提交于
The OpenBlocks A7 board is designed and sold by PlatHome, and based on a Kirkwood 6283 Marvell SoC. It is quite similar to the OpenBlocks A6 already supported in the kernel, with the following main differences: - The A6 uses a RTC on I2C, while the A7 uses the internal SoC RTC. - The A6 has one Ethernet port, while the A7 has two Ethernet ports - The A6 has only one USB port, while the A7 integrates a USB hub, which provides two front-side USB port, and an internal USB port as well. - The A6 has 512 MB of RAM, while the A7 has 1 GB of RAM. - Slightly different GPIOs for some functions. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 30 10月, 2013 7 次提交
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由 Tim Kryger 提交于
Several of the options in bcm_defconfig have gotten out of date so regenerate it with "make savedefconfig" to keep things fresh. Signed-off-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org>
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由 Christian Daudt 提交于
Add HAVE_ARM_ARCH_TIMER to Broadcom Kconfig as it is required for some Mobile SoCs. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Reviewed-by: NMarkus Mayer <mmayer@broadcom.com> Reviewed-by: NMark Hambleton <mahamble@broadcom.com> Reviewed-by: NJames King <jamesk@broadcom.com>
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由 Christian Daudt 提交于
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs. In order to allow other Broadcom SoCs to also use mach-bcm directory and files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Acked-by: NOlof Johansson <olof@lixom.net> Changes from v2: - switch ARCH_MULTIPLATFORM from select to depends - remove 'default y' from BCM_MOBILE Changes from v1: - fix alpha ordering in dts/Makefile - break into 4 patches for separate subsys
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由 H Hartley Sweeten 提交于
Convert ep93xx to use the OHCI platform driver and remove the ohci-ep93xx bus glue driver. Enable CONFIG_OHCI_HCD_PLATFORM in the ep93xx_defconfig so that USB is still enabled by default on the EP93xx platform. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Olof Johansson <olof@lixom.net> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Russell King 提交于
Olof Johansson reported: In file included from arch/arm/include/asm/page.h:163:0, from include/linux/mm_types.h:16, from include/linux/sched.h:24, from arch/arm/kernel/asm-offsets.c:13: arch/arm/include/asm/memory.h: In function '__virt_to_idmap': arch/arm/include/asm/memory.h:300:6: error: 'arch_virt_to_idmap' undeclared (first use in this function) caused by arch_virt_to_idmap being placed inside a different preprocessor conditional to its user. Move it along side its user. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Tomi Valkeinen 提交于
New u-boot versions no longer set the pinmuxing for Panda's DPI output, and the muxing has to be done in the .dts file. Add pinmuxing for DPI and TFP410. Without these, the DVI output on Panda does not work with recent u-boot. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Lokesh Vutla 提交于
Add the AM33xx RNG module's device tree data. Also add Documentation file describing the data for the RNG module. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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