Fix msr instructions detection. The current code
just use msrclr for loading msr content and compare
it with proper MSR content. If msrclr is not implemented
r8 contains pc address.
Previous code wanted to use MSR carry bit but if msrclr
wasn't implemented carry wasn't cleared.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Little endian system needs to check OF_DT_HEADER
but it is swapped because it is in big-endian.
Microblaze LE provides lwr instruction which loads
magic number in BIG endian format which can be compared.

There is used the fact that if you write 0x1 as word
and load it as byte then you get for big-endian zero
and 1 for little-endian.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Allow developer to configure memory page size at compile time.
Larger pages can improve performance on some workloads.

Based on PowerPC code.
Signed-off-by: NSteven J. Magnani <steve@digidescorp.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

_start is located in .text, which causes mismatch warnings with
machine_early_init() and start_kernel() in .init.text.
Signed-off-by: NSteven J. Magnani <steve@digidescorp.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

I forget to change register name in comments.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

TLB size was hardcoded in asm code. This patch brings ability
to change TLB size only in one place. (mmu.h).
Signed-off-by: NMichal Simek <monstr@monstr.eu>

When the system has no lmb bram, main memory should be start from
zero because of microblaze vectors.

DTS fragment could look like:
	DDR2_SDRAM: memory@0 {
		device_type = "memory";
		reg = < 0x0 0x10000000 >;
	} ;

Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused
that kernel physical start address will be zero. On reset vector place
will be jump to 0x100 and on 0x100 starts kernel text.

You have to solve how to load the kernel before cpu starts.
Tested with XMD.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

For copy was used r7 register when CONFIG_CMDLINE_BOOL option
is enabled. But r7 stores pointer to fdt that's why machine_early_init
not detect compiled-in DTB.

I also moved kernel PID setup to have TLB init in one block
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Add a common header file for working with the flattened device tree
data structure and merge the shared data tags used by Microblaze and
PowerPC
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NDavid S. Miller <davem@davemloft.net>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NMichal Simek <monstr@monstr.eu>
Acked-by: NStephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: NStephen Rothwell <sfr@canb.auug.org.au>

It is more safe to use clear instead of msrset.
We save some instructions too.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

It was necessary to use fourth parameter(r8) in early_printk
to show messages on console.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

It is necessary to zeroed r7 when r7 points to bad
dtb - this caused that we have correct messages
about compiled-in dtb or passing via r7
Signed-off-by: NMichal Simek <monstr@monstr.eu>

I can't clear r7 because if I do it I lose information
where DTB come from.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

If r7 is zero at kernel boot, or does not point to a valid DTB, then
we fall back to a DTB (assumed to be) linked statically in the kernel, instead
of blindly copying bogus cruft into the kernel DTB memory region
Signed-off-by: NJohn Williams <john.williams@petalogix.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Signed-off-by: NMichal Simek <monstr@monstr.eu>

Reviewed-by: NIngo Molnar <mingo@elte.hu>
Acked-by: NStephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: NJohn Linn <john.linn@xilinx.com>
Acked-by: NJohn Williams <john.williams@petalogix.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>