- 25 4月, 2008 3 次提交
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由 Michael Hennerich 提交于
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=4053Singed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Atsushi Nemoto 提交于
This driver did not control NCE signal during normal operations (only enable NCE on probing and disable NCE on removing). This patch make NCE signal inactive on idle state. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Richard Genoud 提交于
The sam926x docs allegedly don't list an "ECC_PARITY" field, and the header files in the upstream kernel don't have it either. Masking with it was useless anyway, so just remove it. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 24 4月, 2008 1 次提交
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由 Richard Genoud 提交于
This is a patch to use the hardware ECC controller of the AT91SAM9260 and AT91SAM9263 for the AT91 nand. On AT91 NAND, there's now a choice between ECC soft, ECC hard or no ECC (for debug). It has been tested on AT91SAM9263 with 8 bits large and small page NAND. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 23 4月, 2008 36 次提交
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由 David Woodhouse 提交于
We haven't seen bugs in this for a while now, since the rewrite. No need to be _quite_ so verbose... Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
When _all_ the blocks were on the erase_pending_list, we could't find a block to GC from but there was no _actually_ free space, and jffs2_reserve_space() would get a little unhappy. Handle this case by returning -EAGAIN from jffs2_garbage_collect_pass(). There are two callers of that function -- jffs2_flush_wbuf_gc(), which will interpret it as an error and flush the writebuffer by other means, and jffs2_reserve_space(), which we modify to respond to -EAGAIN with an immediate call to jffs2_erase_pending_blocks() and another run round the loop. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Just to keep the debug code happy when it's adding all the blocks up. Otherwise, they disappear for a while while the locks are dropped to check them and write the cleanmarker. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Artem Bityutskiy 提交于
UBI scan takes quite a time on some systems, so it is nice to print a message that we started attaching an MTD device. Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Anders Grafström 提交于
It looks the error paths in jffs2_block_check_erase() have wrong return values. A block that failed to be erased never gets marked as bad. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
drivers/mtd/ar7part.c: In function ‘create_mtd_partitions’: drivers/mtd/ar7part.c:69: warning: passing argument 4 of ‘master->read’ from incompatible pointer type drivers/mtd/ar7part.c:91: warning: passing argument 4 of ‘master->read’ from incompatible pointer type drivers/mtd/ar7part.c:99: warning: passing argument 4 of ‘master->read’ from incompatible pointer type drivers/mtd/ar7part.c:110: warning: passing argument 4 of ‘master->read’ from incompatible pointer type drivers/mtd/ar7part.c:111: error: ‘SQUASHFS_MAGIC’ undeclared (first use in this function) drivers/mtd/ar7part.c:111: error: (Each undeclared identifier is reported only once drivers/mtd/ar7part.c:111: error: for each function it appears in.) Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Thomas Kunze 提交于
collie seems to contain LH28F640BF flash chips. According to http://sharp-world.com/products/device/flash/pdf/*FUM00701*@E.pdf (page 83) if they have 0x51 of Extended Query Table (number of hardware partitions) set to zero, they have a single fixed partition. This patch makes those chips work. Signed-off-by: NThomas Kunze <thommycheck@gmx.de> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Haven't had any complaints about it recently, despite having the test code enabled to verify that the calculated length is correct. Kill it off, just by #undef TEST_TOTLEN for now; removing it for real can come a little later. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
The problem fixed in commit 014b164e (space leak with in-band cleanmarkers) would have been caught a lot quicker if our paranoid debugging mode had included adding up the size counts from all the eraseblocks and comparing the totals with the counts in the superblock. Add that. Make jffs2_mark_erased_block() file the newly-erased block on the free_list before calling the debug function, to make it happy. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
We were accounting for the cleanmarker by calling jffs2_link_node_ref() (without locking!), which adjusted both superblock and per-eraseblock accounting, subtracting the size of the cleanmarker from {jeb,c}->free_size and adding it to {jeb,c}->used_size. But only _then_ were we adding the size of the newly-erased block back to the superblock counts, and we were adding each of jeb->{free,used}_size to the corresponding superblock counts. Thus, the size of the cleanmarker was effectively subtracted from the superblock's free_size _twice_. Fix this, by always adding a full eraseblock size to c->free_size when we've erased a block. And call jffs2_link_node_ref() under the proper lock, while we're at it. Thanks to Alexander Yurchenko and/or Damir Shayhutdinov for (almost) pinpointing the problem. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
... instead of <linux/semaphore.h> which we don't need any more anyway. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
With modern systems using bus-hold instead of bus pull-up, it can often lead to erroneous reporting of NAND devices where there are none. Do a double probe to ensure that the result we got the first time is repeatable, and if it is not then return that there is no chip there. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
Add support to disable ECC checking for a given chip when passed by the board via the platform data. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
Add support for the ECC layout to be passed via the platform data specified by the board. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
If a block's ecc field is all 0xff, then ignore the ECC correction. This is for systems where some of the blocks, such as the initial cramfs are written without ECC and need to be loaded on start. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
This adds support for using large page NAND devices with the S3C24XX NAND controller. This also adds the file Documentation/arm/Samsung-S3C24XX/NAND.txt to describe the differences. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Ben Dooks 提交于
Commit 03680b1e incorrectly was assuming S3C2410_NFCONF was being used to select the NAND chip. Fix this error by ising the sel_reg. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Adrian Hunter 提交于
A power loss while writing can result in a page becoming unreadable. When the device is mounted again, reading that page gives controller errors. Upper level software like JFFS2 treat -EIO as fatal, refusing to mount at all. That means it is necessary to treat the error as an ECC error to allow recovery. Note that typically in this case, the eraseblock can still be erased and rewritten i.e. it has not become a bad block. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Brownell 提交于
Minor tweaks to omap_nor ... as with most platform drivers, its probe and remove logic can (and should!) safely vanish in most configs. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Trent Piepho 提交于
This is a known erratum confirmed by Spansion. I have an errata document, but I can't find a link to it anywhere on their site to include here. Some of the S29GL064N chips report 64 sectors when they should report 128, and some of S29GL032N chips report 127 sectors when they should report 63. Note that when the chip dies are fixed by Spansion, they will still have the same id. The fix is done in such a way that it won't affect corrected chips. The fixups use the extended id made available by a previous patch. Without that, virtually all newer AMD/Spansion chips will have the same ID (0x227e) and it's not possible to apply the fixup to the correct chips. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Trent Piepho 提交于
AMD/Spansion use a device id of 0x7e to indicate an extended device is present at offset 0xe and 0xf in the query data. I've verified with Spansion that all their chips (mfr == 0x01) with an id of 0x7e use it to indicate an extended id is present. What's more, there are no chips with a NON-extended id that is the same as a different chip's extended id. In other words, when the extended ID is present, one can replace the normal id with the extended id without losing any information. Which is what I've done. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Anton Vorontsov 提交于
Using current driver elbc sometimes hangs during nand write. Reading back last byte helps though (thanks to Scott Wood for the idea). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Hamish Moffatt 提交于
This patch sets mtd->name to the platform bus ID in the plat_nand driver, so that you can specify partitions readily with mtdparts=. Currently it relies on nand_base filling in the name from the device, which results in names like "NAND 256MiB 3,3V 8-bit", that you can't use with cmdlineparts. Signed-off-by: NHamish Moffatt <hamish@cloud.net.au> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Mike Hench 提交于
Fix a race condition in fsl_elbc_run_command Fix incorrect usage of clearbits32 that bashed option register Remove work around for bashed register Signed-off-by: NMike Hench <mhench@elutions.com> Acked-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Anton Vorontsov 提交于
Currently fsl_elbc_nand doesn't initialize mtd->name, and this causes nand_get_flash_type() to assign name that is equal to chip type, like this: root@b1:~# cat /proc/mtd dev: size erasesize name mtd0: 00800000 00010000 "fe000000.flash" mtd1: 02000000 00004000 "NAND 32MiB 3,3V 8-bit" mtd0 is physmap_of flash (normal name), and mtd1 is fsl_elbc_nand. Despite inconsistency, with mtd name like this specifying paritions from the kernel command line becomes a torture (though, I didn't tried and not sure if mtdparts= can handle spaces at all). Plus, this causes real bugs when multiple fsl_elbc_nand chips registered. With this patch applied fsl_elbc_nand chip will have proper name: root@b1:~# cat /proc/mtd dev: size erasesize name mtd0: 00800000 00010000 "fe000000.flash" mtd1: 02000000 00004000 "e0600000.flash" p.s. We can't use priv->dev->bus_id as in physmap_of, because fsl_elbc_nand pretends to be a localbus controller, so its bus_id is "address.localbus", which is incorrect and thus will also not work for multiple chips. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Matteo Croce 提交于
Signed-off-by: NMatteo Croce <technoboy85@gmail.com> Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NEugene Konev <ejka@imfi.kspu.ru> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Anton Vorontsov 提交于
This is very simple driver, NAND is connected through localbus, and User-Programmable Machine is doing various adjustments to speak NAND. No special efforts needed to do read and write cycles, though to control ALE and CLE phases, we ask UPM to generate exact pre-programmed signals on the localbus lines. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Andrei Dolnikov 提交于
Add support for the SST 36VF3203 flash chip. It is used on Emerson KSI8560 board. Signed-off-by: NAndrei Dolnikov <adolnikov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Florian Fainelli 提交于
This enhances plat-ram to take a map_probes argument in the platform_data structure which allow plat-ram to support any direct-mapped device that MTD supports (jedec, cfi, amd ..) A few items are also fixed: - Don't panic if probes is 0 - Actually use the partition list that is passed in Signed-off-by: NFlorian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Paulius Zaleckas 提交于
Untested, but shouldn't break anything... Makes MTD_XIP arch independent. I guess this is why xip_iprefetch() was made for. Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt> Acked-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 eric miao 提交于
This is preliminary since: 1. It supports only _one_ chip select at the moment. As there is no existing platforms available using two chip selects of the NAND controller, it shall really not include code for supporting the 2nd chip select for now, as such code cannot be verified. 2. It resorts to the default and simpliest memory based badblock table 3. Only limited types of nand flash are currently supported. Most PXA3xx processors come with on-chip NAND flash dies, so there isn't much flexibility for other types of NAND. 4. The NAND controller should be configured to detect the device's ID, thus making it difficult to use nand_scan_ident() to assist the detection process (though it's not impossible) TODO: fix all the above limitations of cuz :-) Signed-off-by: Neric miao <eric.miao@marvell.com> Cc: Sergey Podstavin <spodstavin@ru.mvista.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Roel Kluin 提交于
Acked-By: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Thomas Petazzoni 提交于
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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