Add node mmc0 ~ mmc3 for mt8173.dtsi
Add node mmc0, mmc1 for mt8173-evb.dts
Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This adds afe (audio front end) device node to the MT8173 dtsi file.
Signed-off-by: NKoro Chen <koro.chen@mediatek.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This patch adds an idle-states node to describe the mt8173 idle states and
also adds references to the idle-states node in all CPU nodes.
Signed-off-by: NHoward Chen <howard.chen@linaro.org>
Acked-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This adds the SCPSYS device node to the MT8173 dtsi file.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Add MT8173 I2C device nodes, include I2C controllers and pins.
MT8173 has six I2C controllers, from i2c0 to i2c6, exclude i2c5.
The 6th I2C controller register base doesn't next to 5th I2C,
and there is a hardware between 5th and 6th I2C controller. So
SoC designer name 6th controller as "i2c6", not "i2c5".
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Add MT8173 watchdog device node.
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This adds the device node for the PMIC wrapper.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

We used to use a fixed rate clock for the UARTs. Now that we have clock
support we can associate the correct clocks to the UARTs and drop the
26MHz fixed rate UART clock.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

This adds the device nodes providing clocks on the Mediatek MT8173.
These are: topckgen, infracfg, pericfg and apmixedsys. These are
fed by two oscillators also added by this patch.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Fix indentation nits to make mt8173.dtsi more consistent.
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

The 8173 pinctrl node doesn't follow dts convention. Fix them.
Also add a comment to explain pinctrl register usage to make it
more clear.
Signed-off-by: NYingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: NDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Add pinctrl, GPIO and EINT node to mt8173.dtsi.
Signed-off-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>

Add device tree support for MT8173 SoC and evaluation board based on it.
Signed-off-by: NEddie Huang <eddie.huang@mediatek.com>
Acked-by: Arnd Bergmann <arnd at arndb.de>
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>