- 21 1月, 2012 2 次提交
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由 Nicolas Pitre 提交于
Now that all implementations of arch_idle() are equivalent to cpu_do_idle() we can just use the later directly and stop including mach/system.h. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NStephen Warren <swarren@nvidia.com>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@linaro.org> Tested-by: NTony Lindgren <tony@atomide.com>
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- 09 12月, 2011 8 次提交
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由 Santosh Shilimkar 提交于
Add OMAP4 CPUIDLE support. CPU1 is left with defualt idle and the low power state for it is managed via cpu-hotplug. This patch adds MPUSS low power states in cpuidle. C1 - CPU0 ON + CPU1 ON + MPU ON C2 - CPU0 OFF + CPU1 OFF + MPU CSWR C3 - CPU0 OFF + CPU1 OFF + MPU OSWR OMAP4460 onwards, MPUSS power domain doesn't support OFF state any more anymore just like CORE power domain. The deepest state supported is OSWr. Ofcourse when MPUSS and CORE PD transitions to OSWR along with device off mode, even the memory contemts are lost which is as good as the PD off state. On OMAP4 because of hardware constraints, no low power states are targeted when both CPUs are online and in SMP mode. The low power states are attempted only when secondary CPU gets offline to OFF through hotplug infrastructure. Thanks to Nicole Chalhoub <n-chalhoub@ti.com> for doing exhaustive C-state latency profiling. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS OSWR configuration is as below. - CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained OMAP4460 onwards, MPUSS power domain doesn't support OFF state any more anymore just like CORE power domain. The deepest state supported is OSWR. On OMAP4430 secure devices too, MPUSS off mode can't be used because of a bug which alters Ducati and Tesla states. Hence MPUSS off mode as an independent state isn't supported on OMAP44XX devices. Ofcourse when MPUSS power domain transitions to OSWR along with device off mode, it eventually hits off state since memory contents are lost. Hence the MPUSS off mode independent state is not attempted without device off mode. All the necessary infrastructure code for MPUSS off mode is in place as part of this series. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds MPUSS(MPU Sub System) power domain CSWR(Close Switch Retention) support to system wide suspend. For MPUSS power domain to hit retention(CSWR or OSWR), both CPU0 and CPU1 power domains need to be in OFF or DORMANT state, since CPU power domain CSWR is not supported by hardware Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
Default arch_idle() isn't good enough for OMAP4 because of aync bridge errata and necessity of NOPs post WFI to avoid speculative prefetch aborts. Hence Use OMAP4 custom omap_do_wfi() hook for default idle. Later in the series, async bridge errata work-around patch updates the omap_do_wfi() with necessary interconnects barriers. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch retention (CSWR) is not supported by hardware design. The CPUx OFF mode isn't supported on OMAP4430 ES1.0 CPUx sleep code is common for hotplug, suspend and CPUilde. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
Initialise hardware supervised mode for all clockdomains if it's supported. Initiate sleep transition for other clockdomains, if they are not being used. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
On OMAP4430 ES1.0, Power Management features are not supported. Avoid omap4_pm_init() on ES1.0 silicon so that we can continue to use same kernel binary to boot on all OMAP4 silicons. The ES1.0 boot failure with OMAP4 PM series was because of the clockdomain initialisation code. Hardware supervised clockdomain mode isn't functional for all clockdomains on OMAP4430 ES1.0 silicon so avoid the same. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: NKevin Hilman <khilman@ti.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
As per OMAP4430 TRM, the dynamic dependency between MPUSS -> EMIF and MPUSS -> L4PER/L3_* and DUCATI -> L3_* clockdomains is enable by default. Refer register CM_MPU_DYNAMICDEP description for details. But these dynamic dependencies doesn't work as expected. The hardware recommendation is to enable static dependencies for above clockdomains. Without this, system locks up or randomly crashes. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Acked-by: NJean Pihet <j-pihet@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Tested-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 18 11月, 2011 1 次提交
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由 Tony Lindgren 提交于
As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 5月, 2011 1 次提交
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由 Nishanth Menon 提交于
pm44xx.c is built only when CONFIG_PM is setup, remove redundant CONFIG_PM check. This also fixes: https://bugzilla.kernel.org/show_bug.cgi?id=25022Reported-by: NMartin Etti <ettl.martin@gmx.de> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 12月, 2010 2 次提交
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由 Paul Walmsley 提交于
The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
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由 Jean Pihet 提交于
Some bad interaction between the idle and the suspend paths has been identified: the idle code is called during the suspend enter and exit sequences. This could cause corruption or lock-up of resources. The solution is to move the calls to disable_hlt at the very beginning of the suspend sequence (ex. in omap3_pm_begin instead of omap3_pm_prepare), and the call to enable_hlt at the very end of the suspend sequence (ex. in omap3_pm_end instead of omap3_pm_finish). Tested with RET and OFF on Beagle and OMAP3EVM. Signed-off-by: NJean Pihet <j-pihet@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 16 11月, 2010 1 次提交
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由 Lionel Debroux 提交于
While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: NLionel Debroux <lionel_debroux@yahoo.fr> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 02 8月, 2010 1 次提交
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由 Rajendra Nayak 提交于
This patch adds support for basic suspend doing a CPUx wfi for OMAP4. All powerdomains are for now are kept programmed in ON state. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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