1. 30 11月, 2016 3 次提交
  2. 29 11月, 2016 3 次提交
  3. 25 11月, 2016 2 次提交
    • R
      drm: hdlcd: Fix cleanup order · 747e5a5f
      Robin Murphy 提交于
      If hdlcd_drm_bind() fails at drm_fbdev_cma_init(), its cleanup will call
      drm_mode_config_cleanup() as if to balance drm_mode_config_reset(). The
      net result is that drm_connector_cleanup() will clean up the active
      connectors long before component_unbind_all() gets called, so when the
      connector later tries to clean up itself after being unbound, Bad Things
      can happen:
      
      [    4.121888] Unable to handle kernel NULL pointer dereference at
      virtual address 00000000
      [    4.129951] pgd = ffffff80091e0000
      [    4.133345] [00000000] *pgd=00000009ffffe003, *pud=00000009ffffe003,
      *pmd=0000000000000000
      [    4.141613] Internal error: Oops: 96000005 [#1] PREEMPT SMP
      [    4.147144] Modules linked in:
      [    4.150188] CPU: 0 PID: 122 Comm: kworker/u12:2 Not tainted
      4.8.0-rc2+ #989
      [    4.157097] Hardware name: ARM Juno development board (r1) (DT)
      [    4.162981] Workqueue: deferwq deferred_probe_work_func
      [    4.168173] task: ffffffc975d93200 task.stack: ffffffc975dac000
      [    4.174055] PC is at drm_connector_cleanup+0x58/0x1c0
      [    4.179074] LR is at tda998x_unbind+0x24/0x40
      [    4.183401] pc : [<ffffff80084c46f0>] lr : [<ffffff800850414c>]
      pstate: 00000045
      [    4.190750] sp : ffffffc975dafa10
      [    4.194041] x29: ffffffc975dafa10 x28: ffffffc9768152a8
      [    4.199325] x27: ffffffc97ff46450 x26: ffffff8008d99000
      [    4.204608] x25: dead000000000100 x24: dead000000000200
      [    4.209891] x23: ffffffc976bf91e8 x22: 0000000000000000
      [    4.215172] x21: ffffffc976bf9170 x20: ffffffc976bf9170
      [    4.220454] x19: ffffffc976bf9018 x18: 0000000000000000
      [    4.225737] x17: 0000000074ce71ee x16: 000000008ff5d35f
      [    4.231019] x15: ffffffc97681e91c x14: ffffffffffffffff
      [    4.236301] x13: ffffffc97681e185 x12: 0000000000000038
      [    4.241583] x11: 0101010101010101 x10: 0000000000000000
      [    4.246866] x9 : 0000000040000000 x8 : 0000000000210d00
      [    4.252148] x7 : ffffffc97fea8c00 x6 : 000000000000001b
      [    4.257430] x5 : ffffff80084b7b8c x4 : 0000000000000080
      [    4.262712] x3 : ffffff8008504128 x2 : ffffffc975df3800
      [    4.267993] x1 : 0000000000000000 x0 : 0000000000000000
      ...
      [    4.750937] [<ffffff80084c46f0>] drm_connector_cleanup+0x58/0x1c0
      [    4.756990] [<ffffff800850414c>] tda998x_unbind+0x24/0x40
      [    4.762354] [<ffffff8008507918>] component_unbind.isra.4+0x28/0x50
      [    4.768492] [<ffffff8008507a0c>] component_unbind_all+0xcc/0xd8
      [    4.774373] [<ffffff80084d5adc>] hdlcd_drm_bind+0x234/0x418
      [    4.779909] [<ffffff8008507b58>] try_to_bring_up_master+0x140/0x1a0
      [    4.786133] [<ffffff8008507c50>] component_add+0x98/0x170
      [    4.791496] [<ffffff8008504b90>] tda998x_probe+0x18/0x20
      [    4.796774] [<ffffff80086bf914>] i2c_device_probe+0x164/0x258
      [    4.802481] [<ffffff800850d094>] driver_probe_device+0x204/0x2b0
      [    4.808447] [<ffffff800850d28c>] __device_attach_driver+0x9c/0xf8
      [    4.814498] [<ffffff800850b108>] bus_for_each_drv+0x58/0x98
      [    4.820033] [<ffffff800850cd64>] __device_attach+0xc4/0x138
      [    4.825567] [<ffffff800850d338>] device_initial_probe+0x10/0x18
      [    4.831446] [<ffffff800850c124>] bus_probe_device+0x94/0xa0
      [    4.836981] [<ffffff800850c5b0>] deferred_probe_work_func+0x78/0xb0
      [    4.843207] [<ffffff80080d2998>] process_one_work+0x118/0x378
      [    4.848914] [<ffffff80080d2c40>] worker_thread+0x48/0x498
      [    4.854276] [<ffffff80080d8918>] kthread+0xd0/0xe8
      [    4.859036] [<ffffff8008082e90>] ret_from_fork+0x10/0x40
      [    4.864314] Code: f2fbd5b9 f2fbd5b8 f8478ee0 eb17001f (f9400013)
      [    4.870472] ---[ end trace a643cfe4ce1d838b ]---
      
      Fix this by moving the drm_mode_config_cleanup() much later such that it
      correctly balances drm_mode_config_init().
      Suggested-by: NRussell King <linux@armlinux.org.uk>
      Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      747e5a5f
    • A
      gpu/drm/exynos/exynos_hdmi - Unmap region obtained by of_iomap · d7420002
      Arvind Yadav 提交于
      Free memory mapping, if hdmi_probe is not successful.
      Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com>
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d7420002
  4. 24 11月, 2016 5 次提交
  5. 22 11月, 2016 1 次提交
    • R
      drm/arm: hdlcd: fix plane base address update · 7a79279e
      Russell King 提交于
      While testing HDMI with Xorg on the Juno board, I find that when Xorg
      starts up or shuts down, the display is shifted significantly to the
      right and wrapped in the active region.  (No sync bars are visible.)
      The timings are correct, it behaves as if the start address has been
      shifted many pixels _into_ the framebuffer.
      
      This occurs whenever the display mode size is changed - using xrandr
      in Xorg shows that changing the resolution triggers the problem
      almost every time, but changing the refresh rate does not.
      
      Using devmem2 to disable and re-enable the HDLCD resolves the issue,
      and repeated disable/enable cycles do not make the issue re-appear.
      Further debugging shows that we try to update the controller
      configuration while enabled.
      
      Alwys ensure that the HDLCD is disabled prior to updating the
      controller timings, and use drm_crtc_vblank_off()/drm_crtc_vblank_on()
      so that DRM knows whether it can expect vblank interrupts.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      7a79279e
  6. 18 11月, 2016 2 次提交
  7. 17 11月, 2016 1 次提交
  8. 16 11月, 2016 3 次提交
  9. 11 11月, 2016 10 次提交
  10. 09 11月, 2016 5 次提交
    • L
      drm/imx: disable planes before DC · 5ced937b
      Lucas Stach 提交于
      If the DC clock is disabled before the attached IDMACs are properly
      stopped the IDMACs may hang the IPU or even the whole system.
      
      Make sure the IDMACs are in safe state by disabling the planes before
      removal of the DC clock.
      
      Also set the atomic parameter to false to stop calling the atomic_begin
      hook, which does nothing useful as we immediately afterwards turn off
      vblank interrupts and possibly send the pending vblank event.
      
      Fixes: 33f14235 (drm/imx: atomic phase 1: Use transitional atomic
                           CRTC and plane helpers)
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      5ced937b
    • S
      drm/fsl-dcu: disable planes before disabling CRTC · 3d6f3710
      Stefan Agner 提交于
      After disabling and reenabling the CRTC the DCU sometimes got stuck
      displaying the whole screen with a solid color. Disabling and
      reenabling the CRTC did not recover from the situation. This was
      often reproducable by just restarting the X-Server.
      
      The disabling sequence is not explicitly documented. But it turns
      out that disabling the planes before disabling the CRTC seems to
      prevent the above situation from happening.
      
      Use the callback ->atomic_disable instead of ->disable which allows
      to use the drm_atomic_helper_disable_planes_on_crtc() helper to
      disable planes before disabling the controller.
      Signed-off-by: NStefan Agner <stefan@agner.ch>
      3d6f3710
    • S
      drm/fsl-dcu: update all registers on flush · 93daeeca
      Stefan Agner 提交于
      Use the UPDATE_MODE READREG bit to initiate a register transfer
      on flush. This makes sure that we flush all registers only once
      for all planes.
      Signed-off-by: NStefan Agner <stefan@agner.ch>
      93daeeca
    • S
      drm/fsl-dcu: do not update when modifying irq registers · 34a515d2
      Stefan Agner 提交于
      The IRQ status and mask registers are not "double buffered" according
      to the reference manual. Hence, there is no extra transfer/update
      write needed when modifying these registers.
      Signed-off-by: NStefan Agner <stefan@agner.ch>
      34a515d2
    • A
      drm/amd/powerplay: return false instead of -EINVAL · f20024d8
      Andrew Shadura 提交于
      Returning -EINVAL from a bool-returning function
      phm_check_smc_update_required_for_display_configuration has an unexpected
      effect of returning true, which is probably not what was intended.
      Replace -EINVAL by false.
      
      The only place this function is called from is
      psm_adjust_power_state_dynamic in
      drivers/gpu/drm/amd/powerplay/eventmgr/psm.c:106:
      
      	if (!equal || phm_check_smc_update_required_for_display_configuration(hwmgr)) {
      		phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
      		phm_set_power_state(hwmgr, &pcurrent->hardware, &requested->hardware);
      		hwmgr->current_ps = requested;
      	}
      
      It seems to expect a boolean value here.
      
      This issue has been found using the following Coccinelle semantic patch
      written by Peter Senna Tschudin:
      <smpl>
      @@
      identifier f;
      constant C;
      typedef bool;
      @@
      bool f (...){
      <+...
      * return -C;
      ...+>
      }
      </smpl>
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NAndrew Shadura <andrew.shadura@collabora.co.uk>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      f20024d8
  11. 08 11月, 2016 5 次提交