The Armada 370 and Armada XP Socs have the same controller that the one
used in the orion platforms.  This patch updates the device tree for
these SoCs.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This reverts commit 0749a442.

The patch caused a build problem in allyesconfig by referencing an
undefined device tree label 'pio'.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This reverts commit 867dc8be.

The patch caused a build problem in allyesconfig by referencing an
undefined device tree label 'pio'.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add max8925 dts support into mmp2 brownstone platform
Signed-off-by: NQing Xu <qingx@marvell.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Currently, the serial nodes define both a clock-frequency and a clocks
property. We should not provide both, since they might conflict.

In practice, this also causes problems since the of_serial driver uses
the clock-frequency property in preference to the clocks property, and
hence doesn't clk_prepare_enable() the clock, which may then leave it
with no known users, and hence the common clock framework will disable
it, thus breaking the port, which is usually the console.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This patch corrects the pin function value of sd4_bus8
from 3 to 4. This is verified on origen board for testing
eMMC on dw_mci controller.
Signed-off-by: NShirish S <s.shirish@samsung.com>
Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Because the CPU1 start address is different for socfpga-vt and
socfpga-cyclone5, we add code to use the correct CPU1 start addr.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Signed-off-by: NPavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Tested-by: NPavel Machek <pavel@denx.de>
Reviewed-by: NPavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Pavel Machek <pavel@denx.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Up to this point, support for socfpga has only been on a virtual
platform. Now that actual hardware is available, we add the appropriate
device tree source files.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Tested-by: NPavel Machek <pavel@denx.de>
Reviewed-by: NPavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Add da850 wdt DT node.
Add OF_DEV_AUXDATA for wdt driver to use wdt clock.
Signed-off-by: NKumar, Anil <anilkumar.v@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add I2C0 device tree and pin muxing information to da850-evm.
Also, add OF_DEV_AUXDATA for I2C0 controller driver in da850
board dt file to use I2C0 clock.
Verified i2c0 node gets created in sys class interface as
"/sys/class/i2c-dev/i2c-0/subsystem/i2c-0".

nsekhar@ti.com: tested using i2cdetect and i2cdump.
Signed-off-by: NVishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Default ecc correctable setting is 2bits in 512 bytes.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Default ecc correctable setting is 2bits in 512 bytes.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Sylvain FARGIER <sylvain.fargier@somfy.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Fix the use of USART on both at91sam9x5 and at91sam9n12. In DTS, the
atmel,use-dma-[rx|tx] property is present but a DMA channel cannot be used.
Indeed the connexion between the DMA engine and the slave is not implemented
yet in Device Tree.
Note however that this property is also used for PDC (private DMA) on older
SoCs. This is why the driver alone cannot determine the validity of this
property.
Reported-by: NDouglas Gilbert <dgilbert@interlog.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> [3.8+]

ptp should use enet_ref instead of pll6_enet
pll6_enet is fixed 500Mhz.
There are divider between enet_ref and pll6_enet
Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Cubieboard has two LEDs available for use, a blue one (labeled LED1)
and a green one (labeled LED2).
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
A9 cores and the ECME happens over the pl320 IPC channel.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The preference is to use '-' instead of '_' in compatible strings.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Comment for usart3 TXD (TXD3) is correct, dt code is wrong.
Signed-off-by: NDouglas Gilbert <dgilbert@interlog.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The renaming of pinctrl_uart3 to pinctrl_usart3 was missed in
commit 9e3129e9 (ARM: at91: fix usart/uart namimg in pinctrl).
Signed-off-by: NRobert Nelson <robertcnelson@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As the wdt nodes have the gic as their interrupt-parent, their
interrupts property should be 3 cells in format described in the gic
devicetree binding document.

This patch fixes the interrupts property in the wdt nodes to be in the
correct format.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NPawel Moll <pawel.moll@arm.com>

Add DT entry for pinmux and drive configuration addresses.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Tegra114 has the GPIO controllers with 8 GPIO bank and each bank
supports 32 pins.

Add DT entry for GPIO controller. Tegra114 GPIO controller is
compatible with Tegra30 GPIO controller driver.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add SMMU entry.
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Use functional name for DT entry instead of h/w name.
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Use functional name for DT entry instead of h/w name.
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The DAC found on the last chip select requires a word length of 12 bits,
which is not supported by the SSP controller of the iMX28. Use
bitbanging for that bus to support such a length.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch removes custom way of adding spi dma channels and
adds according to new generic DMA DT bindings.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add the basic device tree based lookup.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>