1. 09 12月, 2009 2 次提交
    • N
      powerpc/pseries: Kernel DLPAR Infrastructure · ab519a01
      Nathan Fontenot 提交于
      The Dynamic Logical Partitioning capabilities of the powerpc pseries platform
      allows for the addition and removal of resources (i.e. CPU's, memory, and PCI
      devices) from a partition. The removal of a resource involves
      removing the resource's node from the device tree and then returning the
      resource to firmware via the rtas set-indicator call.  To add a resource, it
      is first obtained from firmware via the rtas set-indicator call and then a
      new device tree node is created using the ibm,configure-coinnector rtas call
      and added to the device tree.
      
      This patch provides the kernel DLPAR infrastructure in a new filed named
      dlpar.c.  The functionality provided is for acquiring and releasing a resource
      from firmware and the parsing of information returned from the
      ibm,configure-connector rtas call.  Additionally this exports the pSeries
      reconfiguration notifier chain so that it can be invoked when device tree
      updates are made.
      Signed-off-by: NNathan Fontenot <nfont@austin.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ab519a01
    • B
      powerpc/macio: Rework hotplug media bay support · d58b0c39
      Benjamin Herrenschmidt 提交于
      The hotplug mediabay has tendrils deep into drivers/ide code
      which makes a libata port reather difficult. In addition it's
      ugly and could be done better.
      
      This reworks the interface between the mediabay and the rest
      of the world so that:
      
         - Any macio_driver can now have a mediabay_event callback
      which will be called when that driver sits on a mediabay and
      it's been either plugged or unplugged. The device type is
      passed as an argument. We can now move all the IDE cruft
      into the IDE driver itself
      
         - A check_media_bay() function can be used to take a peek
      at the type of device currently in the bay if any, a cleaner
      variant of the previous function with the same name.
      
         - A pair of lock/unlock functions are exposed to allow the
      IDE driver to block the hotplug callbacks during the initial
      setup and probing of the bay in order to avoid nasty race
      conditions.
      
         - The mediabay code no longer needs to spin on the status
      register of the IDE interface when it detects an IDE device,
      this is done just fine by the IDE code itself
      
      Overall, less code, simpler, and allows for another driver
      than our old drivers/ide based one.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d58b0c39
  2. 08 12月, 2009 4 次提交
  3. 02 12月, 2009 1 次提交
  4. 27 11月, 2009 1 次提交
  5. 24 11月, 2009 4 次提交
  6. 12 11月, 2009 7 次提交
  7. 05 11月, 2009 10 次提交
  8. 30 10月, 2009 10 次提交
    • M
      powerpc: Enable sparse irq_descs on powerpc · cd015707
      Michael Ellerman 提交于
      Defining CONFIG_SPARSE_IRQ enables generic code that gets rid of the
      static irq_desc array, and replaces it with an array of pointers to
      irq_descs.
      
      It also allows node local allocation of irq_descs, however we
      currently don't have the information available to do that, so we just
      allocate them on all on node 0.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cd015707
    • T
      powerpc/nvram_64: Remove unused code · ae7dd020
      Thomas Gleixner 提交于
      nvram_find_partition() has no user. The call site was removed in the
      arch/powerpc move, but the function stayed. Remove it.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: linuxppc-dev@ozlabs.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ae7dd020
    • M
      powerpc: Fix potential compile error irqs_disabled_flags · 0682d6c1
      Michael Neuling 提交于
      irqs_disabled_flags is #defined in linux/irqflags.h when
      CONFIG_TRACE_IRQFLAGS_SUPPORT is enabled.  64 and 32 bit always have
      CONFIG_TRACE_IRQFLAGS_SUPPORT enabled so just remove
      irqs_disabled_flags.
      
      This fixes the case when someone needs to include both linux/irqflags.h
      and asm/hw_irq.h.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0682d6c1
    • D
      powerpc/mm: Bring hugepage PTE accessor functions back into sync with normal accessors · 0895ecda
      David Gibson 提交于
      The hugepage arch code provides a number of hook functions/macros
      which mirror the functionality of various normal page pte access
      functions.  Various changes in the normal page accessors (in
      particular BenH's recent changes to the handling of lazy icache
      flushing and PAGE_EXEC) have caused the hugepage versions to get out
      of sync with the originals.  In some cases, this is a bug, at least on
      some MMU types.
      
      One of the reasons that some hooks were not identical to the normal
      page versions, is that the fact we're dealing with a hugepage needed
      to be passed down do use the correct dcache-icache flush function.
      This patch makes the main flush_dcache_icache_page() function hugepage
      aware (by checking for the PageCompound flag).  That in turn means we
      can make set_huge_pte_at() just a call to set_pte_at() bringing it
      back into sync.  As a bonus, this lets us remove the
      hash_huge_page_do_lazy_icache() function, replacing it with a call to
      the hash_page_do_lazy_icache() function it was based on.
      
      Some other hugepage pte access hooks - huge_ptep_get_and_clear() and
      huge_ptep_clear_flush() - are not so easily unified, but this patch at
      least brings them back into sync with the current versions of the
      corresponding normal page functions.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0895ecda
    • D
      powerpc/mm: Split hash MMU specific hugepage code into a new file · 883a3e52
      David Gibson 提交于
      This patch separates the parts of hugetlbpage.c which are inherently
      specific to the hash MMU into a new hugelbpage-hash64.c file.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      883a3e52
    • D
      powerpc/mm: Cleanup initialization of hugepages on powerpc · d1837cba
      David Gibson 提交于
      This patch simplifies the logic used to initialize hugepages on
      powerpc.  The somewhat oddly named set_huge_psize() is renamed to
      add_huge_page_size() and now does all necessary verification of
      whether it's given a valid hugepage sizes (instead of just some) and
      instantiates the generic hstate structure (but no more).
      
      hugetlbpage_init() now steps through the available pagesizes, checks
      if they're valid for hugepages by calling add_huge_page_size() and
      initializes the kmem_caches for the hugepage pagetables.  This means
      we can now eliminate the mmu_huge_psizes array, since we no longer
      need to pass the sizing information for the pagetable caches from
      set_huge_psize() into hugetlbpage_init()
      
      Determination of the default huge page size is also moved from the
      hash code into the general hugepage code.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d1837cba
    • D
      powerpc/mm: Allow more flexible layouts for hugepage pagetables · a4fe3ce7
      David Gibson 提交于
      Currently each available hugepage size uses a slightly different
      pagetable layout: that is, the bottem level table of pointers to
      hugepages is a different size, and may branch off from the normal page
      tables at a different level.  Every hugepage aware path that needs to
      walk the pagetables must therefore look up the hugepage size from the
      slice info first, and work out the correct way to walk the pagetables
      accordingly.  Future hardware is likely to add more possible hugepage
      sizes, more layout options and more mess.
      
      This patch, therefore reworks the handling of hugepage pagetables to
      reduce this complexity.  In the new scheme, instead of having to
      consult the slice mask, pagetable walking code can check a flag in the
      PGD/PUD/PMD entries to see where to branch off to hugepage pagetables,
      and the entry also contains the information (eseentially hugepage
      shift) necessary to then interpret that table without recourse to the
      slice mask.  This scheme can be extended neatly to handle multiple
      levels of self-describing "special" hugepage pagetables, although for
      now we assume only one level exists.
      
      This approach means that only the pagetable allocation path needs to
      know how the pagetables should be set out.  All other (hugepage)
      pagetable walking paths can just interpret the structure as they go.
      
      There already was a flag bit in PGD/PUD/PMD entries for hugepage
      directory pointers, but it was only used for debug.  We alter that
      flag bit to instead be a 0 in the MSB to indicate a hugepage pagetable
      pointer (normally it would be 1 since the pointer lies in the linear
      mapping).  This means that asm pagetable walking can test for (and
      punt on) hugepage pointers with the same test that checks for
      unpopulated page directory entries (beq becomes bge), since hugepage
      pointers will always be positive, and normal pointers always negative.
      
      While we're at it, we get rid of the confusing (and grep defeating)
      #defining of hugepte_shift to be the same thing as mmu_huge_psizes.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a4fe3ce7
    • D
      powerpc/mm: Cleanup management of kmem_caches for pagetables · a0668cdc
      David Gibson 提交于
      Currently we have a fair bit of rather fiddly code to manage the
      various kmem_caches used to store page tables of various levels.  We
      generally have two caches holding some combination of PGD, PUD and PMD
      tables, plus several more for the special hugepage pagetables.
      
      This patch cleans this all up by taking a different approach.  Rather
      than the caches being designated as for PUDs or for hugeptes for 16M
      pages, the caches are simply allocated to be a specific size.  Thus
      sharing of caches between different types/levels of pagetables happens
      naturally.  The pagetable size, where needed, is passed around encoded
      in the same way as {PGD,PUD,PMD}_INDEX_SIZE; that is n where the
      pagetable contains 2^n pointers.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a0668cdc
    • M
      powerpc: Remove get_irq_desc() · 6cff46f4
      Michael Ellerman 提交于
      get_irq_desc() is a powerpc-specific version of irq_to_desc(). That
      is reason enough to remove it, but it also doesn't know about sparse
      irq_desc support which irq_to_desc() does (when we enable it).
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Acked-by: NGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6cff46f4
    • M
      powerpc: Make NR_IRQS a CONFIG option · 551b81f2
      Michael Ellerman 提交于
      The irq_desc array consumes quite a lot of space, and for systems
      that don't need or can't have 512 irqs it's just wasted space.
      
      The first 16 are reserved for ISA, so the minimum of 32 is really
      16 - and no one has asked for more than 512 so leave that as the
      maximum.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      551b81f2
  9. 14 10月, 2009 1 次提交
    • A
      powerpc: Fix hypervisor TLB batching · b6dcde5c
      Anton Blanchard 提交于
      Profiling of a page fault scalability microbenchmark shows flush_hash_range
      is not calling the batch hpte invalidate hcall (H_BULK_REMOVE).
      
      It turns out we have a duplicate firmware feature for hcall-bulk and the
      current setup code stops after finding the first match. This meant we never
      batch and always do individual invalidates.
      
      The patch below removes the duplicate and shifts FW_FEATURE_CMO to close
      the gap. With the patch applied the single threaded page fault rate improves
      from 217169 to 238755 per second on a POWER5 test box, a 10% improvement.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b6dcde5c