- 06 5月, 2011 2 次提交
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由 Sergei Shtylyov 提交于
Move DA8XX_MMCSD0_BASE, DA8XX_LCD_CNTRL_BASE, and DA8XX_DDR2_CTL_BASE from <mach/da8xx.h> to devices-da8xx.c as the latter file is the only place where these macros are used. While at it, restore sorting the base address macros by address value in devices-da8xx.c... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
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由 Sergei Shtylyov 提交于
Commit 044ca015 (davinci: da850/omap-l138: add support for SoC suspend) introduced DA8XX_PLL1_BASE despite PLL1 exists only on DA850/OMAP-L138 and da850.c even already #define'd DA850_PLL1_BASE. Kill the duplicate macro, renaming an existing reference to it... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
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- 12 3月, 2011 1 次提交
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由 Michael Williamson 提交于
Add IO resource structures, platform data, and a registration routine in order to support spi device on DA850/OMAP-L138/AM18x and DA830/OMAP-L137/AM17x platforms. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 01 3月, 2011 5 次提交
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由 Michael Williamson 提交于
The da850 uart pinmux arrays are not used. Remove them. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Michael Williamson 提交于
The da850_mmcsd0_pins pinmux array contains pins that are specific to the da850 evm board (the write protect and card detect GPIO pins). Move the array to the board file. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Michael Williamson 提交于
The da850_mcasp_pins pinmux array is specific to the da850_evm, and is not generic. Move the array to the board file, make it static initdata, and rename it accordingly. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Michael Williamson 提交于
The da850_emif25_pins pinmux array is not used. Remove it. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Michael Williamson 提交于
The da850_cpgmac_pins pinmux array is not used. Remove it. Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com> Tested-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 23 12月, 2010 1 次提交
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由 Sekhar Nori 提交于
AM18x/DA850/OMAP-L138 SoCs have variants that can operate at a maximum of 456 MHz at 1.3V operating point. Also the 1.2V operating point has a variant that can support a maximum of 375 MHz. This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz) to the list of DA850 OPPs. Not all silicon is qualified to run at higher speeds and unfortunately the maximum speed the chip can support can only be determined from the label on the package (not software readable). Because of this, we depend on the maximum speed grade information to be provided to us in some board specific way. The board informs the maximum speed grade information by setting the da850_max_speed variable. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 24 9月, 2010 4 次提交
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由 Juha Kuikka 提交于
Add resources, platform device and convenience registration function for DA850's second MMC/SD controller (MMCSD1). Signed-off-by: NJuha Kuikka <juha.kuikka@elektrobit.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sergei Shtylyov 提交于
The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode specific pin lists, while what pin group is used is a function of how the board is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly, and merge the two lists in da850.c into one, da850_cpgmac_pins[], representing the CPGMAC module as a whole... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: NBen Gardiner <bengardiner@nanometrics.ca> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sergei Shtylyov 提交于
The NAND/NOR flash pin lists (da850_nand_pins/da850_nor_pins) are purely board specific and as such shouldn't be in da850.c -- copy them to board-da850-evm.c, renaming to da850_evm_nand_pins/da850_evm_nor_pins respectively, and merge the two lists in da850.c into one, representing the EMIF 2.5 module as a whole, just like we have it in da830.c... While at it, remove the '__init' modifier from da850_evm_setup_nor_nand() as this function is called from non '__init' code... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Tested-by: NBen Gardiner <bengardiner@nanometrics.ca> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF timing to remain valid even as the PLL0 output is changed by cpufreq driver to save power. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 06 8月, 2010 1 次提交
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由 Rajashekhara, Sudhakar 提交于
The drivers on da8xx/omapl EVMs do not utilize all the channels and slots provided by EDMA. Some of these are better utilitzed by the DSP on the SoC for speeding up codec operations. Reserve these channels/slots for the DSP. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 07 5月, 2010 3 次提交
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由 Cyril Chemparathy 提交于
The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Tested-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Cyril Chemparathy 提交于
Pinmux registers are sequential, and do not need to be enumerated out as they currently are. This reduces code volume and keeps things simple. If some future SoC comes up with a discontiguous register map, PINMUX() can then be expanded with local token pasting. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Cyril Chemparathy 提交于
Rename da8xx_pinmux_setup() to davinci_cfg_reg_list() and promote it for use in other SOCs that may need the ability to configure multiple pins in one shot. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 08 4月, 2010 1 次提交
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由 Sergei Shtylyov 提交于
This hushes the following warning: arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: ‘struct platform_device’ declared inside parameter list arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: its scope is only this definition or declaration, which is probably not what you want Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 06 4月, 2010 1 次提交
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由 Sekhar Nori 提交于
The da8xx/omap-l1 boards refuse to build when CONFIG_DAVINCI_MUX is undefined because arch/arm/mach-davinci/mux.c:da8xx_pinmux_setup() is not defined. This patch fixes this issue. This is build tested with davinci_all_defconfig and da8xx_omapl_defconfig and boot tested on DA830 EVM. Reported-by: NShanmuga Sundaram Mahendran <shanmuga@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 05 2月, 2010 5 次提交
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由 Sekhar Nori 提交于
This patch adds support for registering for suspend-to-RAM functionality on da850/omap-l138 SoCs. da850 supports wakeup based on external event and RTC alarm. Currently only RTC alarm based wakeup is supported. Support for wakeup based on external event will be added as later improvements. For scheduling an alarm event on RTC some useful code is present in Documentation/rtc.txt Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sriramakrishnan 提交于
The davinci EMAC peripheral is also available on other TI platforms -notably TI AM3517 SoC. This patch modifies the config option and the platform structure header files so that the driver can be reused on non-davinci platforms as well. Signed-off-by: NSriramakrishnan <srk@ti.com> Acked-by: NChaithrika U S <chaithrika@ti.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Create static map for internal SRAM and populate SRAM base and size in soc_info structure to allow SRAM allocation functions from arch/arm/mach-davinci/sram.c to work. On DA850 SRAM is used for suspend-to-RAM implementation in places where DDR2 cannot be accessed as its clocks are stopped. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
When suspend is supported, both cpuidle and suspend code need to work on DDR2 registers. Instead of mapping the DDR2 registers twice, do it once outside of cpuidle driver and let cpuidle driver get the virtual base address of DDR2 registers. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
OMAP-L138 adds a second SYSCFG region having useful functionality like deep sleep, pull up/down control and SATA clock stop. This patch makes provision for accessing registers from second SYSCFG region in da8xx code. Note that OMAP-L137 has a single SYSCFG region. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 26 11月, 2009 13 次提交
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由 Sekhar Nori 提交于
This patch provides a function to help register cpuidle driver on da8xx/omap-l1xx platforms. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sergei Shtylyov 提交于
Add the function to register the MUSB platform device. Additional compile warning fixes by Sekhar Nori. Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Chaithrika U S 提交于
DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY is enabled by proper programming of the IO Expander (TCA6416) ports. Also for RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds support for RMII PHY. This patch also adds a menuconfig option to select one or no peripheral connected to expander. Currently, sub-options in this menu are RMII and no peripheral.This menuconfig option is similar to the one present for UI card on DA830/OMAP-L137 EVM. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Adds basic frequency scaling support for DA850/OMAP-L138. Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1 as yet. Peripherals like MMC/SD which have a clock input synchronous with ARM clock will not work well since the clock will change behind their backs. Support for notification to such devices to adjust themselves to the new frequency will be added in later patches. Current defconfigs keep CPUFreq disabled so it will not affect normal operation. The OPP defintions assume clock input of 24MHz to the SoC. This is inline with hardcoding of input frequency in the <soc>.c files. At some point this will need to move into board dependent code as new boards appear with a different reference clock. Tested on OMAP-L138 EVM with ondemand governer and a shell script to vary processor load. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sergei Shtylyov 提交于
Add the function to register the OHCI platform device, given the root hub related platform data passed from the board specific code. The platfrom data provide for overriding the OHCI port power and over-current bits at the board level. Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sergei Shtylyov 提交于
These are needed by the MUSB and OHCI glue layers... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
Add RTC support for the da830/omap-l137 and da850/omap-l138 SoC's by leveraging existing the rtc-omap driver. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
Add support for the Sharp LCD035Q3DG01 graphical LCD. This requires a minor interface change to da8xx_register_lcdc() so that the board code can pass in the platform_data which describes the lcd controller that's to be used. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2 and PLL0 SYSCLK2. Having Async3 source from PLL1 SYSCLK2 allows peripherals on that domain to remain unaffected by frequency scaling on PLL0. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
This makes it clear that JTAG ID register is part of the SYSCFG module Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sekhar Nori 提交于
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line with the public documentation for these parts. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Mark A. Greer 提交于
For consistency with existing code, change the name of da8xx_init_mcasp() to da8xx_register_mcasp(). Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 26 8月, 2009 3 次提交
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由 Sudhakar Rajashekhara 提交于
This patch adds platform data for the 8MB NOR flash found on da850/omap-l138 EVM. Both NOR and NAND can co-exist on da850/omap-l138 as they are using different chip selects. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sudhakar Rajashekhara 提交于
This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sudhakar Rajashekhara 提交于
There are two instances of MMC/SD on da850/omap-l138. Connector for the first instance is available on the EVM. This patch adds support for this instance. This patch also adds support for card detect and write protect switches on da850/omap-l138 EVM. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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