1. 27 7月, 2015 1 次提交
  2. 18 5月, 2015 1 次提交
  3. 12 3月, 2015 1 次提交
    • S
      drm/dp: Use large transactions for I2C over AUX · 1d002fa7
      Simon Farnsworth 提交于
      Older DisplayPort to DVI-D Dual Link adapters designed by Bizlink have bugs
      in their I2C over AUX implementation (fixed in newer revisions). They work
      fine with Windows, but fail with Linux.
      
      It turns out that they cannot keep an I2C transaction open unless the
      previous read was 16 bytes; shorter reads can only be followed by a zero
      byte transfer ending the I2C transaction.
      
      Copy Windows's behaviour, and read 16 bytes at a time. If we get a short
      reply, assume that there's a hardware bottleneck, and shrink our read size
      to match. For this purpose, use the algorithm in the DisplayPort 1.2 spec,
      in the hopes that it'll be closest to what Windows does.
      
      Also provide an unsafe module parameter for testing smaller transfer sizes,
      in case there are sinks out there that cannot work with Windows.
      
      Note also that despite the previous comment in drm_dp_i2c_xfer, this speeds
      up native DP EDID reads; Ville Syrjälä <ville.syrjala@linux.intel.com> found
      the following changes in his testing:
      
      Device under test:     old  -> with this patch
      DP->DVI (OUI 001cf8):  40ms -> 35ms
      DP->VGA (OUI 0022b9):  45ms -> 38ms
      Zotac DP->2xHDMI:      25ms ->  4ms
      Asus PB278 monitor:    22ms ->  3ms
      
      A back of the envelope calculation shows that peak theoretical transfer rate
      for 1 byte reads is around 60 kbit/s; with 16 byte reads, this increases to
      around 500 kbit/s, which explains the increase in speed.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55228
      Tested-by: Aidan Marks <aidanamarks@gmail.com> (v3)
      Signed-off-by: NSimon Farnsworth <simon.farnsworth@onelan.co.uk>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1d002fa7
  4. 10 3月, 2015 4 次提交
  5. 24 2月, 2015 1 次提交
  6. 02 2月, 2015 1 次提交
  7. 05 11月, 2014 1 次提交
    • T
      drm/dp: Add counters in the drm_dp_aux struct for I2C NACKs and DEFERs · e9cf6194
      Todd Previte 提交于
      These counters are used for Displayort compliance testing to detect error
      conditions when executing tests 4.2.2.4 and 4.2.2.5 in the Displayport Link
      CTS specificaiton. They determine whether to use the preferred/requested
      mode or the failsafe mode during these tests.
      
      V2:
      - Addressed previous review feedback
      - Updated commit message
      - Changed from uint8_t to uint32_t
      
      Cc: dri-devel@lists.freedesktop.org
      Signed-off-by: NTodd Previte <tprevite@gmail.com>
      [danvet: s/uint32_t/unsigned/ for clearer intent. Also drop the i915
      from the subject, it's all core stuff.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      e9cf6194
  8. 23 10月, 2014 1 次提交
  9. 30 9月, 2014 1 次提交
    • R
      drm/i915: Fix Sink CRC · ad9dc91b
      Rodrigo Vivi 提交于
      In some cases like when PSR just got enabled the panel need more vblank
      times to calculate CRC. I figured that out with the new PSR test cases
      facing some cases that I had a green screen but a blank CRC. Even with
      2 vblank waits on kernel + 2 vblank waits on test case.
      
      So let's give up to 6 vblank wait time. However we now check for
      TEST_CRC_COUNT that shows when panel finished to calculate CRC and
      has it ready.
      
      v2: Jani pointed out attempts decrements was wrong and should never reach
      the error condition. And Daniel pointed out that EIO is more appropriated than
      EGAIN. Also I realized that I have to read test_crc_count after setting
      test_sink
      
      v3: Rebase and adding error message
      
      Cc: Todd Previte <tprevite@gmail.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: NTodd Previte <tprevite@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ad9dc91b
  10. 03 9月, 2014 2 次提交
  11. 05 6月, 2014 1 次提交
  12. 02 6月, 2014 1 次提交
  13. 27 5月, 2014 1 次提交
  14. 23 5月, 2014 1 次提交
  15. 08 4月, 2014 1 次提交
  16. 18 3月, 2014 1 次提交
  17. 27 2月, 2014 4 次提交
    • T
      drm/dp: Allow registering AUX channels as I2C busses · 88759686
      Thierry Reding 提交于
      Implements an I2C-over-AUX I2C adapter on top of the generic drm_dp_aux
      infrastructure. It extracts the retry logic from existing drivers, which
      should help in porting those drivers to this new helper.
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      ---
      Changes in v5:
      - move comments partially to to header file
      - keep MOT set between I2C messages
      - return -EPROTO on short reads
      
      Changes in v4:
      - fix typo "bitrate" -> "bit rate"
      
      Changes in v3:
      - add back DRM_DEBUG_KMS and DRM_ERROR messages
      - embed i2c_adapter within struct drm_dp_aux
      - fix typo in comment
      88759686
    • T
      drm/dp: Add DisplayPort link helpers · 516c0f7c
      Thierry Reding 提交于
      Add a helper to probe a DP link (read out the supported DPCD revision,
      maximum rate, link count and capabilities) as well as power up the DP
      link and configure it accordingly.
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      ---
      Changes in v5:
      - export helpers
      
      Changes in v4:
      - fix a couple of typos in comments as pointed out by Alex Deucher
      
      Changes in v3:
      - split into drm_dp_link_power_up() and drm_dp_link_configure()
      - do not change sink state for DPCD versions earlier than 1.1
      - sleep for 1-2 ms after setting local sink to D0 state
      - read and write consecutive registers where possible
      - read DPCD revision when link is probed
      - remove duplicate kerneldoc
      516c0f7c
    • T
      drm/dp: Add drm_dp_dpcd_read_link_status() · 8d4adc6a
      Thierry Reding 提交于
      The function reads the link status (6 bytes starting at offset 0x202)
      from the DPCD so that it can be conveniently passed to other DPCD
      helpers.
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      8d4adc6a
    • T
      drm/dp: Add AUX channel infrastructure · c197db75
      Thierry Reding 提交于
      This is a superset of the current i2c_dp_aux bus functionality and can
      be used to transfer native AUX in addition to I2C-over-AUX messages.
      
      Helpers are provided to read and write the DPCD, either blockwise or
      byte-wise. Many of the existing helpers for DisplayPort take a copy of a
      portion of the DPCD and operate on that, without a way to write data
      back to the DPCD (e.g. for configuration of the link).
      
      Subsequent patches will build upon this infrastructure to provide common
      functionality in a generic way.
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      ---
      Changes in v5:
      - move comments partially to struct drm_dp_aux_msg in header file
      - return -EPROTO on short reads in DPCD helpers
      
      Changes in v4:
      - fix a typo in a comment
      
      Changes in v3:
      - reorder drm_dp_dpcd_writeb() arguments to be more intuitive
      - return number of bytes transferred in drm_dp_dpcd_write()
      - factor out drm_dp_dpcd_access()
      - describe error codes
      c197db75
  18. 27 1月, 2014 1 次提交
  19. 18 12月, 2013 2 次提交
  20. 09 10月, 2013 1 次提交
  21. 01 10月, 2013 2 次提交
  22. 18 7月, 2013 1 次提交
  23. 28 11月, 2012 1 次提交
  24. 23 10月, 2012 6 次提交
  25. 03 10月, 2012 2 次提交