- 17 11月, 2014 1 次提交
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由 Rob Clark 提交于
Convert mdp4 display controller backend to atomic helpers. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 02 4月, 2014 1 次提交
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由 Matt Roper 提交于
Use drm_universal_plane_init() and drm_crtc_init_with_planes() rather than the legacy drm_plane_init() / drm_crtc_init(). This will ensure that the proper primary plane is registered with the DRM (and eventually exposed to userspace in future patches). Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: NMatt Roper <matthew.d.roper@intel.com> Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 06 2月, 2014 1 次提交
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由 Rob Clark 提交于
Small typo I noticed in the mdp4_plane code.. no consequence because PIPE_SRC_XY and PIPE_DST_XY have same register layout. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 10 1月, 2014 3 次提交
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由 Rob Clark 提交于
We'll want basically the same thing for mdp5, so refactor it out so it can be shared. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
This can be shared between mdp4 and mdp5. Both use the same set of parameters to describe the format to the hw. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
There are some little bits and pieces that mdp4 and mdp5 can share, so move things around so that we can have both in a common parent directory. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 02 11月, 2013 2 次提交
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由 Rob Clark 提交于
Enable using VG1 and VG2 for planes. Currently YUV/CSC or scaling is not enabled, but ARGB and xRGB blending is. Signed-off-by: NRob Clark <robdclark@gmail.com> Acked-by: NDavid Brown <davidb@codeaurora.org>
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由 Rob Clark 提交于
resync to latest envytools db, fixes a typo: s/mpd4/mdp4/ Signed-off-by: NRob Clark <robdclark@gmail.com> Acked-by: NDavid Brown <davidb@codeaurora.org>
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- 25 8月, 2013 1 次提交
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由 Rob Clark 提交于
The snapdragon chips have multiple different display controllers, depending on which chip variant/version. (As far as I can tell, current devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And then external to the display controller are HDMI, DSI, etc. blocks which may be shared across devices which have different display controller blocks. To more easily add support for different display controller blocks, the display controller specific bits are split out into a "kms" module, which provides the kms plane/crtc/encoder objects. The external HDMI, DSI, etc. blocks are part encoder, and part connector currently. But I think I will pull in the drm_bridge patches from chromeos tree, and split them into a bridge+connector, with the registers that need to be set in modeset handled by the bridge. This would remove the 'msm_connector' base class. But some things need to be double checked to make sure I could get the correct ON/OFF sequencing.. This patch adds support for mdp4 crtc (including hw cursor), dtv encoder (part of MDP4 block), and hdmi. Signed-off-by: NRob Clark <robdclark@gmail.com>
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