1. 18 3月, 2015 12 次提交
  2. 10 3月, 2015 11 次提交
  3. 05 3月, 2015 10 次提交
  4. 04 3月, 2015 7 次提交
    • I
      drm/i915: gen4: work around hang during hibernation · ab3be73f
      Imre Deak 提交于
      Bjørn reported that his machine hang during hibernation and eventually
      bisected the problem to the following commit:
      
      commit da2bc1b9
      Author: Imre Deak <imre.deak@intel.com>
      Date:   Thu Oct 23 19:23:26 2014 +0300
      
          drm/i915: add poweroff_late handler
      
      The problem seems to be that after the kernel puts the device into D3
      the BIOS still tries to access it, or otherwise assumes that it's in D0.
      This is clearly bogus, since ACPI mandates that devices are put into D3
      by the OSPM if they are not wake-up sources. In the future we want to
      unify more of the driver's runtime and system suspend paths, for example
      by skipping all the system suspend/hibernation hooks if the device is
      runtime suspended already. Accordingly for all other platforms the goal
      is still to properly power down the device during hibernation.
      
      v2:
      - Another GEN4 Lenovo laptop had the same issue, while platforms from
        other vendors (including mobile and desktop, GEN4 and non-GEN4) seem
        to work fine. Based on this apply the workaround on all GEN4 Lenovo
        platforms.
      - add code comment about failing platforms (Ville)
      
      Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/060633.htmlReported-and-bisected-by: NBjørn Mork <bjorn@mork.no>
      Cc: stable@vger.kernel.org # v3.19
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Acked-by: NDaniel Vetter <daniel.vetter@intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      ab3be73f
    • C
      drm/i915: Check for driver readyness before handling an underrun interrupt · 54fc7c1c
      Chris Wilson 提交于
      When we takeover from the BIOS and install our interrupt handler, the
      BIOS may have left us a few surprises in the form of spontaneous
      interrupts. (This is especially likely on hardware like 965gm where
      display fifo underruns are continuous and the GMCH cannot filter that
      interrupt souce.) As we enable our IRQ early so that we can use it
      during hardware probing, our interrupt handler must be prepared to
      handle a few sources prior to being fully configured. As such, we need
      to add a simple is-ready check prior to dereferencing our KMS state for
      reporting underruns.
      Reported-by: NRob Clark <rclark@redhat.com>
      Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Cc: stable@vger.kernel.org
      [Jani: dropped the extra !]
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      54fc7c1c
    • A
      drm/radeon: fix interlaced modes on DCE8 · 77ae5f4b
      Alex Deucher 提交于
      Need to double the viewport height.
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      77ae5f4b
    • T
      drm/radeon: fix DRM_IOCTL_RADEON_CS oops · a28b2a47
      Tommi Rantala 提交于
      Passing zeroed drm_radeon_cs struct to DRM_IOCTL_RADEON_CS produces the
      following oops.
      
      Fix by always calling INIT_LIST_HEAD() to avoid the crash in list_sort().
      
      ----------------------------------
      
       #include <stdint.h>
       #include <fcntl.h>
       #include <unistd.h>
       #include <sys/ioctl.h>
       #include <drm/radeon_drm.h>
      
       static const struct drm_radeon_cs cs;
      
       int main(int argc, char **argv)
       {
               return ioctl(open(argv[1], O_RDWR), DRM_IOCTL_RADEON_CS, &cs);
       }
      
      ----------------------------------
      
      [ttrantal@test2 ~]$ ./main /dev/dri/card0
      [   46.904650] BUG: unable to handle kernel NULL pointer dereference at           (null)
      [   46.905022] IP: [<ffffffff814d6df2>] list_sort+0x42/0x240
      [   46.905022] PGD 68f29067 PUD 688b5067 PMD 0
      [   46.905022] Oops: 0002 [#1] SMP
      [   46.905022] CPU: 0 PID: 2413 Comm: main Not tainted 4.0.0-rc1+ #58
      [   46.905022] Hardware name: Hewlett-Packard HP Compaq dc5750 Small Form Factor/0A64h, BIOS 786E3 v02.10 01/25/2007
      [   46.905022] task: ffff880058e2bcc0 ti: ffff880058e64000 task.ti: ffff880058e64000
      [   46.905022] RIP: 0010:[<ffffffff814d6df2>]  [<ffffffff814d6df2>] list_sort+0x42/0x240
      [   46.905022] RSP: 0018:ffff880058e67998  EFLAGS: 00010246
      [   46.905022] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000000
      [   46.905022] RDX: ffffffff81644410 RSI: ffff880058e67b40 RDI: ffff880058e67a58
      [   46.905022] RBP: ffff880058e67a88 R08: 0000000000000000 R09: 0000000000000000
      [   46.905022] R10: ffff880058e2bcc0 R11: ffffffff828e6ca0 R12: ffffffff81644410
      [   46.905022] R13: ffff8800694b8018 R14: 0000000000000000 R15: ffff880058e679b0
      [   46.905022] FS:  00007fdc65a65700(0000) GS:ffff88006d600000(0000) knlGS:0000000000000000
      [   46.905022] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [   46.905022] CR2: 0000000000000000 CR3: 0000000058dd9000 CR4: 00000000000006f0
      [   46.905022] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      [   46.905022] DR3: 0000000000000000 DR6: 00000000ffff4ff0 DR7: 0000000000000400
      [   46.905022] Stack:
      [   46.905022]  ffff880058e67b40 ffff880058e2bcc0 ffff880058e67a78 0000000000000000
      [   46.905022]  0000000000000000 0000000000000000 0000000000000000 0000000000000000
      [   46.905022]  0000000000000000 0000000000000000 0000000000000000 0000000000000000
      [   46.905022] Call Trace:
      [   46.905022]  [<ffffffff81644a65>] radeon_cs_parser_fini+0x195/0x220
      [   46.905022]  [<ffffffff81645069>] radeon_cs_ioctl+0xa9/0x960
      [   46.905022]  [<ffffffff815e1f7c>] drm_ioctl+0x19c/0x640
      [   46.905022]  [<ffffffff810f8fdd>] ? trace_hardirqs_on_caller+0xfd/0x1c0
      [   46.905022]  [<ffffffff810f90ad>] ? trace_hardirqs_on+0xd/0x10
      [   46.905022]  [<ffffffff8160c066>] radeon_drm_ioctl+0x46/0x80
      [   46.905022]  [<ffffffff81211868>] do_vfs_ioctl+0x318/0x570
      [   46.905022]  [<ffffffff81462ef6>] ? selinux_file_ioctl+0x56/0x110
      [   46.905022]  [<ffffffff81211b41>] SyS_ioctl+0x81/0xa0
      [   46.905022]  [<ffffffff81dc6312>] system_call_fastpath+0x12/0x17
      [   46.905022] Code: 48 89 b5 10 ff ff ff 0f 84 03 01 00 00 4c 8d bd 28 ff ff
      ff 31 c0 48 89 fb b9 15 00 00 00 49 89 d4 4c 89 ff f3 48 ab 48 8b 46 08 <48> c7
      00 00 00 00 00 48 8b 0e 48 85 c9 0f 84 7d 00 00 00 c7 85
      [   46.905022] RIP  [<ffffffff814d6df2>] list_sort+0x42/0x240
      [   46.905022]  RSP <ffff880058e67998>
      [   46.905022] CR2: 0000000000000000
      [   47.149253] ---[ end trace 09576b4e8b2c20b8 ]---
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NTommi Rantala <tt.rantala@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      a28b2a47
    • A
      drm/radeon: do a posting read in cik_set_irq · cffefd9b
      Alex Deucher 提交于
      To make sure the writes go through the pci bridge.
      
      bug:
      https://bugzilla.kernel.org/show_bug.cgi?id=90741Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      cffefd9b
    • A
      drm/radeon: do a posting read in si_set_irq · 0586915e
      Alex Deucher 提交于
      To make sure the writes go through the pci bridge.
      
      bug:
      https://bugzilla.kernel.org/show_bug.cgi?id=90741Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      0586915e
    • A
      drm/radeon: do a posting read in evergreen_set_irq · c320bb5f
      Alex Deucher 提交于
      To make sure the writes go through the pci bridge.
      
      bug:
      https://bugzilla.kernel.org/show_bug.cgi?id=90741Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      c320bb5f