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  1. 29 5月, 2015 1 次提交
    • D
      radeon: Deinline indirect register accessor functions · 9e5acbc2
      Denys Vlasenko 提交于
      This patch deinlines indirect register accessor functions.
      
      These functions perform two mmio accesses, framed by spin lock/unlock.
      Spin lock/unlock by itself takes more than 50 cycles in ideal case
      (if lock is exclusively cached on current CPU).
      
      With this .config: http://busybox.net/~vda/kernel_config,
      after uninlining these functions have sizes and callsite counts
      as follows:
      
      r600_uvd_ctx_rreg: 111 bytes, 4 callsites
      r600_uvd_ctx_wreg: 113 bytes, 5 callsites
      eg_pif_phy0_rreg: 106 bytes, 13 callsites
      eg_pif_phy0_wreg: 108 bytes, 13 callsites
      eg_pif_phy1_rreg: 107 bytes, 13 callsites
      eg_pif_phy1_wreg: 108 bytes, 13 callsites
      rv370_pcie_rreg: 111 bytes, 21 callsites
      rv370_pcie_wreg: 113 bytes, 24 callsites
      r600_rcu_rreg: 111 bytes, 16 callsites
      r600_rcu_wreg: 113 bytes, 25 callsites
      cik_didt_rreg: 106 bytes, 10 callsites
      cik_didt_wreg: 107 bytes, 10 callsites
      tn_smc_rreg: 106 bytes, 126 callsites
      tn_smc_wreg: 107 bytes, 116 callsites
      eg_cg_rreg: 107 bytes, 20 callsites
      eg_cg_wreg: 108 bytes, 52 callsites
      
      Functions r100_mm_rreg() and r100_mm_rreg() have a fast path and
      a locked (slow) path. This patch deinlines only slow path.
      
      r100_mm_rreg_slow: 78 bytes, 2083 callsites
      r100_mm_wreg_slow: 81 bytes, 3570 callsites
      
      Reduction in code size is more than 65,000 bytes:
      
          text     data      bss       dec     hex filename
      85740176 22294680 20627456 128662312 7ab3b28 vmlinux.before
      85674192 22294776 20627456 128598664 7aa4288 vmlinux
      Signed-off-by: NDenys Vlasenko <dvlasenk@redhat.com>
      Cc: Christian König <christian.koenig@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      9e5acbc2
  2. 04 3月, 2015 1 次提交
  3. 23 1月, 2015 1 次提交
  4. 04 12月, 2014 2 次提交
  5. 07 11月, 2014 1 次提交
  6. 19 9月, 2014 1 次提交
  7. 11 9月, 2014 1 次提交
  8. 19 8月, 2014 1 次提交
  9. 05 8月, 2014 4 次提交
  10. 18 7月, 2014 1 次提交
  11. 10 6月, 2014 1 次提交
  12. 02 6月, 2014 3 次提交
  13. 02 4月, 2014 1 次提交
    • M
      drm: Replace crtc fb with primary plane fb (v3) · f4510a27
      Matt Roper 提交于
      Now that CRTC's have a primary plane, there's no need to track the
      framebuffer in the CRTC.  Replace all references to the CRTC fb with the
      primary plane's fb.
      
      This patch was generated by the Coccinelle semantic patching tool using
      the following rules:
      
              @@ struct drm_crtc C; @@
              -   (C).fb
              +   C.primary->fb
      
              @@ struct drm_crtc *C; @@
              -   (C)->fb
              +   C->primary->fb
      
      v3: Generate patch via coccinelle.  Actual removal of crtc->fb has been
          moved to a subsequent patch.
      
      v2: Fixup several lingering crtc->fb instances that were missed in the
          first patch iteration.  [Rob Clark]
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: NRob Clark <robdclark@gmail.com>
      f4510a27
  14. 07 3月, 2014 1 次提交
  15. 04 3月, 2014 1 次提交
  16. 19 2月, 2014 2 次提交
  17. 25 12月, 2013 2 次提交
    • A
      drm/radeon: remove generic rptr/wptr functions (v2) · ea31bf69
      Alex Deucher 提交于
      Fill in asic family specific versions rather than
      using the generic version.  This lets us handle asic
      specific differences more easily.  In this case, we
      disable sw swapping of the rtpr writeback value on
      r6xx+ since the hw does it for us.  Fixes bogus
      rptr readback on BE systems.
      
      v2: remove missed cpu_to_le32(), add comments
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      ea31bf69
    • A
      drm/radeon/pm: move pm handling into the asic specific code · 6c7bccea
      Alex Deucher 提交于
      We need more control over the ordering of dpm init with
      respect to the rest of the asic.  Specifically, the SMC
      has to be initialized before the rlc and cg/pg.  The pm
      code currently initializes late in the driver, but we need
      it to happen much earlier so move pm handling into the asic
      specific callbacks.
      
      This makes dpm more reliable and makes clockgating work
      properly on CIK parts and should help on SI parts as well.
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      6c7bccea
  18. 16 11月, 2013 1 次提交
  19. 06 11月, 2013 1 次提交
  20. 21 9月, 2013 1 次提交
  21. 11 9月, 2013 1 次提交
  22. 31 8月, 2013 1 次提交
  23. 23 7月, 2013 1 次提交
  24. 14 7月, 2013 1 次提交
  25. 06 7月, 2013 1 次提交
  26. 03 6月, 2013 1 次提交
    • A
      radeon: Fix system hang issue when using KMS with older cards · e49f3959
      Adis Hamzić 提交于
      The current radeon driver initialization routines, when using KMS, are written
      so that the IRQ installation routine is called before initializing the WB buffer
      and the CP rings. With some ASICs, though, the IRQ routine tries to access the
      GFX_INDEX ring causing a call to RREG32 with the value of -1 in
      radeon_fence_read. This, in turn causes the system to completely hang with some
      cards, requiring a hard reset.
      
      A call stack that can cause such a hang looks like this (using rv515 ASIC for the
      example here):
       * rv515_init (rv515.c)
       * radeon_irq_kms_init (radeon_irq_kms.c)
       * drm_irq_install (drm_irq.c)
       * radeon_driver_irq_preinstall_kms (radeon_irq_kms.c)
       * rs600_irq_process (rs600.c)
       * radeon_fence_process - due to SW interrupt (radeon_fence.c)
       * radeon_fence_read (radeon_fence.c)
       * hang due to RREG32(-1)
      
      The patch moves the IRQ installation to the card startup routine, after the ring
      has been initialized, but before the IRQ has been set. This fixes the issue, but
      requires a check to see if the IRQ is already installed, as is the case in the
      system resume codepath.
      I have tested the patch on three machines using the rv515, the rv770 and the
      evergreen ASIC. They worked without issues.
      
      This seems to be a known issue and has been reported on several bug tracking
      sites by various distributions (see links below). Most of reports recommend
      booting the system with KMS disabled and then enabling KMS by reloading the
      radeon module. For some reason, this was indeed a usable workaround, however,
      UMS is now deprecated and disabled by default.
      
      Bug reports:
      https://bugzilla.redhat.com/show_bug.cgi?id=845745
      https://bugs.launchpad.net/ubuntu/+source/linux/+bug/561789
      https://bbs.archlinux.org/viewtopic.php?id=156964Signed-off-by: NAdis Hamzić <adis@hamzadis.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      e49f3959
  27. 22 4月, 2013 1 次提交
  28. 01 2月, 2013 5 次提交
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