1. 17 12月, 2008 1 次提交
  2. 15 12月, 2008 1 次提交
  3. 13 12月, 2008 1 次提交
    • R
      cpumask: centralize cpu_online_map and cpu_possible_map · 98a79d6a
      Rusty Russell 提交于
      Impact: cleanup
      
      Each SMP arch defines these themselves.  Move them to a central
      location.
      
      Twists:
      1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
         CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
      
      2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
         Those archs simply have phys_cpu_present_map replaced everywhere.
      
      3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
         so I just manipulate them both in sync.
      
      4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
         declarations.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Reviewed-by: NGrant Grundler <grundler@parisc-linux.org>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Cc: Mike Travis <travis@sgi.com>
      Cc: ink@jurassic.park.msu.ru
      Cc: rmk@arm.linux.org.uk
      Cc: starvik@axis.com
      Cc: tony.luck@intel.com
      Cc: takata@linux-m32r.org
      Cc: ralf@linux-mips.org
      Cc: grundler@parisc-linux.org
      Cc: paulus@samba.org
      Cc: schwidefsky@de.ibm.com
      Cc: lethal@linux-sh.org
      Cc: wli@holomorphy.com
      Cc: davem@davemloft.net
      Cc: jdike@addtoit.com
      Cc: mingo@redhat.com
      98a79d6a
  4. 18 11月, 2008 2 次提交
    • Y
      x86: fix wakeup_cpu with numaq/es7000, v2, fix · 54ac14a8
      Yinghai Lu 提交于
      Impact: fix wakeup_secondary_cpu with hotplug
      
      We can not put that into x86_quirks, because that is __initdata.
      So try to move that to genapic, and add update_genapic in x86_quirks.
      
      later we even could use that stub to:
      
       1. autodetect CONFIG_ES7000_CLUSTERED_APIC
       2. more correct inquire_remote_apic with apic_verbosity setting.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      54ac14a8
    • Y
      x86: fix wakeup_cpu with numaq/es7000, v2 · 569712b2
      Yinghai Lu 提交于
      Impact: fix secondary-CPU wakeup/init path with numaq and es7000
      
      While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
      
      |#ifdef WAKE_SECONDARY_VIA_NMI
      |/*
      | * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
      | * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
      | * won't ... remember to clear down the APIC, etc later.
      | */
      |static int __devinit
      |wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
      |{
      |        unsigned long send_status, accept_status = 0;
      |        int maxlvt;
      |...
      |        if (APIC_INTEGRATED(apic_version[phys_apicid])) {
      |                maxlvt = lapic_get_maxlvt();
      
      I noticed that there is no warning about undefined phys_apicid...
      
      because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
      defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
      
      WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
      WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
      preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
      wakeup strategy a given x86 kernel will use.
      
      The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
      uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
      flag to let secondaries continue).
      
      So convert these mechanisms to x86_quirks and add a
      ->wakeup_secondary_cpu() method to specify the rare exception
      to the sane default.
      
      Extend genapic accordingly as well, for 32-bit.
      
      While looking further, I noticed that functions in wakecup.h for numaq
      and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
      will only use default mach_wakecpu.h with smphook.h.
      
      So we need to add mach_wakecpu.h for mach_generic, to properly support
      numaq and es7000, and vectorize the following SMP init methods:
      
      	int trampoline_phys_low;
      	int trampoline_phys_high;
      	void (*wait_for_init_deassert)(atomic_t *deassert);
      	void (*smp_callin_clear_local_apic)(void);
      	void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
      	void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
      	void (*inquire_remote_apic)(int apicid);
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      569712b2
  5. 22 10月, 2008 1 次提交
  6. 17 10月, 2008 1 次提交
    • A
      Make the taint flags reliable · 25ddbb18
      Andi Kleen 提交于
      It's somewhat unlikely that it happens, but right now a race window
      between interrupts or machine checks or oopses could corrupt the tainted
      bitmap because it is modified in a non atomic fashion.
      
      Convert the taint variable to an unsigned long and use only atomic bit
      operations on it.
      
      Unfortunately this means the intvec sysctl functions cannot be used on it
      anymore.
      
      It turned out the taint sysctl handler could actually be simplified a bit
      (since it only increases capabilities) so this patch actually removes
      code.
      
      [akpm@linux-foundation.org: remove unneeded include]
      Signed-off-by: NAndi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      25ddbb18
  7. 16 10月, 2008 1 次提交
  8. 13 10月, 2008 6 次提交
    • T
      x86: remove additional_cpus · cb48bb59
      Thomas Gleixner 提交于
      remove remainder of additional_cpus logic. We now just listen to the
      disabled_cpus value like we did for years. disabled_cpus is always >=
      0 so no need for an extra check.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      cb48bb59
    • I
      x86: remove additional_cpus configurability · b8073050
      Ingo Molnar 提交于
      additional_cpus=<x> parameter is dangerous and broken: for example
      if we boot additional_cpus=-2 on a stock dual-core system it will
      crash the box on bootup.
      
      So reduce the maze of code a bit by removingthe user-configurability
      angle.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b8073050
    • C
      x86: allow number of additional hotplug CPUs to be set at compile time, V2 · 7f2f49a5
      Chuck Ebbert 提交于
      x86: allow number of additional hotplug CPUs to be set at compile time, V2
      
      The default number of additional CPU IDs for hotplugging is determined
      by asking ACPI or mptables how many "disabled" CPUs there are in the
      system, but many systems get this wrong so that e.g. a uniprocessor
      machine gets an extra CPU allocated and never switches to single CPU
      mode.
      
      And sometimes CPU hotplugging is enabled only for suspend/hibernate
      anyway, so the additional CPU IDs are not wanted. Allow the number
      to be set to zero at compile time.
      
      Also, force the number of extra CPUs to zero if hotplugging is disabled
      which allows removing some conditional code.
      
      Tested on uniprocessor x86_64 that ACPI claims has a disabled processor,
      with CPU hotplugging configured.
      
      ("After" has the number of additional CPUs set to 0)
      Before: NR_CPUS: 512, nr_cpu_ids: 2, nr_node_ids 1
      After: NR_CPUS: 512, nr_cpu_ids: 1, nr_node_ids 1
      
      [Changed the name of the option and the prompt according to Ingo's
       suggestion.]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7f2f49a5
    • C
      x86: move prefill_possible_map calling early, fix, V2 · 14adf855
      Chuck Ebbert 提交于
      Commit 4a701737 ("x86: move prefill_possible_map calling early, fix")
      is the wrong fix: prefill_possible_map() needs to be available
      even when CONFIG_HOTPLUG_CPU is not set. A followon patch will do that.
      
      Fix this correctly by making prefill_possible_map() available even when
      CONFIG_HOTPLUG_CPU is not set. The function is needed so that
      the number of possible CPUs can be determined.
      
      Tested on uniprocessor machine with CPU hotplug disabled.
      
      From boot log:
        Before: NR_CPUS: 512, nr_cpu_ids: 512, nr_node_ids 1
        After: NR_CPUS: 512, nr_cpu_ids: 1, nr_node_ids 1
      Signed-off-by: NChuck Ebbert <cebbert@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      14adf855
    • C
      x86: smpboot - check if we have ESR register in wakeup_secondary_cpu · 59ef48a5
      Cyrill Gorcunov 提交于
      We should check if we have ESR register before reading from it.
      Signed-off-by: NCyrill Gorcunov <gorcunov@gmail.com>
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      Cc: "Maciej W. Rozycki" <macro@linux-mips.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      59ef48a5
    • M
      arch/x86/kernel/smpboot.c: Clarify when irq processing begins. · 0cefa5b9
      Manfred Spraul 提交于
      Secondary cpus start with local interrupts disabled.
      start_secondary() first initializes the new cpu, then it enables the
      local interrupts. (although interrupts are enabled within smp_callin()
      as well).
      
      Right now, the local interrupts are enabled as a side effect of calling
      ipi_call_lock_irq().
      
      The attached patch clarifies when local interrupts are enabled.
      Signed-off-by: NManfred Spraul <manfred@colorfullife.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0cefa5b9
  9. 09 9月, 2008 1 次提交
    • M
      kernel/cpu.c: create a CPU_STARTING cpu_chain notifier · e545a614
      Manfred Spraul 提交于
      Right now, there is no notifier that is called on a new cpu, before the new
      cpu begins processing interrupts/softirqs.
      Various kernel function would need that notification, e.g. kvm works around
      by calling smp_call_function_single(), rcu polls cpu_online_map.
      
      The patch adds a CPU_STARTING notification. It also adds a helper function
      that sends the message to all cpu_chain handlers.
      
      Tested on x86-64.
      All other archs are untested. Especially on sparc, I'm not sure if I got
      it right.
      Signed-off-by: NManfred Spraul <manfred@colorfullife.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e545a614
  10. 25 8月, 2008 3 次提交
  11. 22 8月, 2008 1 次提交
    • M
      x86: fix section mismatch warning - uv_cpu_init · c4bd1fda
      Marcin Slusarz 提交于
      WARNING: vmlinux.o(.cpuinit.text+0x3cc4): Section mismatch in reference from the function uv_cpu_init() to the function .init.text:uv_system_init()
      The function __cpuinit uv_cpu_init() references
      a function __init uv_system_init().
      If uv_system_init is only used by uv_cpu_init then
      annotate uv_system_init with a matching annotation.
      
      uv_system_init was ment to be called only once, so do it from codepath
      (native_smp_prepare_cpus) which is called once, right before activation
      of other cpus (smp_init).
      
      Note: old code relied on uv_node_to_blade being initialized to 0,
      but it'a not initialized from anywhere.
      Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
      Acked-by: NJack Steiner <steiner@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c4bd1fda
  12. 18 8月, 2008 1 次提交
    • M
      x86: silence section mismatch warning - get_local_pda · d19fbfdf
      Marcin Slusarz 提交于
      Take out part of get_local_pda referencing __init function (free_bootmem)
      to new (static) function marked as __ref. It's safe to do because free_bootmem
      is called before __init sections are dropped.
      
      WARNING: vmlinux.o(.cpuinit.text+0x3cd7): Section mismatch in reference from the function get_local_pda() to the function .init.text:free_bootmem()
      The function __cpuinit get_local_pda() references
      a function __init free_bootmem().
      If free_bootmem is only used by get_local_pda then
      annotate free_bootmem with a matching annotation.
      Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
      Cc: Mike Travis <travis@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d19fbfdf
  13. 15 8月, 2008 1 次提交
  14. 14 8月, 2008 2 次提交
    • Y
      x86: check bigsmp in smp_sanity_check instead of cpu_up · a58f03b0
      Yinghai Lu 提交于
      clear bits for cpu nr > 8.
      
      This allows us to boot the full range of possible CPUs that the
      supported APIC model will allow. Previously we'd hang or boot up
      with less than 8 CPUs.
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Tested-by: NJeff Chua <jeff.chua.linux@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a58f03b0
    • M
      x86: resurrect proper handling of maxcpus= kernel option (v2) · 23b49c19
      Max Krasnyansky 提交于
      For some reason we had two parsers registered for maxcpus=. One in init/main.c
      and another in arch/x86/smpboot.c. So I nuked the one in arch/x86.
      
      Also 64-bit kernels used to handle maxcpus= as documented in
      Documentation/cpu-hotplug.txt. CPUs with 'id > maxcpus' are initialized
      but not booted. 32-bit version for some reason ignored them even though
      all the infrastructure for booting them later is there.
      
      In the current mainline both 64 and 32 bit versions are broken.
      This patch restores the correct behaviour. I've tested x86_64 version on
      4- and 8- way Core2 and 2-way Opteron based machines. Various config
      combinations SMP, !SMP, CPU_HOTPLUG, !CPU_HOTPLUG.
      Booted with maxcpus=1 and maxcpus=4, etc. Everything is working as expected.
      
      So far we've received two reports from different people confirming that 32-bit
      version also works fine, both on dual core laptops and 16way server machines.
      
      [v2: This version fixes visws breakage pointed out by Ingo.]
      Signed-off-by: NMax Krasnyansky <maxk@qualcomm.com>
      Cc: lizf@cn.fujitsu.com
      Cc: jeff.chua.linux@gmail.com
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      23b49c19
  15. 12 8月, 2008 1 次提交
  16. 11 8月, 2008 1 次提交
  17. 25 7月, 2008 1 次提交
  18. 22 7月, 2008 1 次提交
  19. 18 7月, 2008 2 次提交
    • M
      x86: APIC: remove apic_write_around(); use alternatives · 593f4a78
      Maciej W. Rozycki 提交于
      Use alternatives to select the workaround for the 11AP Pentium erratum
      for the affected steppings on the fly rather than build time.  Remove the
      X86_GOOD_APIC configuration option and replace all the calls to
      apic_write_around() with plain apic_write(), protecting accesses to the
      ESR as appropriate due to the 3AP Pentium erratum.  Remove
      apic_read_around() and all its invocations altogether as not needed.
      Remove apic_write_atomic() and all its implementing backends.  The use of
      ASM_OUTPUT2() is not strictly needed for input constraints, but I have
      used it for readability's sake.
      
      I had the feeling no one else was brave enough to do it, so I went ahead
      and here it is.  Verified by checking the generated assembly and tested
      with both a 32-bit and a 64-bit configuration, also with the 11AP
      "feature" forced on and verified with gdb on /proc/kcore to work as
      expected (as an 11AP machines are quite hard to get hands on these days).
      Some script complained about the use of "volatile", but apic_write() needs
      it for the same reason and is effectively a replacement for writel(), so I
      have disregarded it.
      
      I am not sure what the policy wrt defconfig files is, they are generated
      and there is risk of a conflict resulting from an unrelated change, so I
      have left changes to them out.  The option will get removed from them at
      the next run.
      
      Some testing with machines other than mine will be needed to avoid some
      stupid mistake, but despite its volume, the change is not really that
      intrusive, so I am fairly confident that because it works for me, it will
      everywhere.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      593f4a78
    • Y
      x86: use cpu_clear in remove_cpu_from_maps · 29cbeb0e
      Yinghai Lu 提交于
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      29cbeb0e
  20. 16 7月, 2008 1 次提交
  21. 12 7月, 2008 3 次提交
    • Y
      x86: make read_apic_id return final apicid · 4c9961d5
      Yinghai Lu 提交于
      also remove GET_APIC_ID when read_apic_id is used.
      
      need to apply after
      	[PATCH] x86: mach_apicdef.h need to include before smp.h
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4c9961d5
    • S
      x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping · 6e1cb38a
      Suresh Siddha 提交于
      x2apic support.  Interrupt-remapping must be enabled before enabling x2apic,
      this is needed to ensure that IO interrupts continue to work properly after the
      cpu mode is changed to x2apic(which uses 32bit extended physical/cluster
      apic id).
      
      On systems where apicid's are > 255, BIOS can handover the control to OS in
      x2apic mode. Or if the OS handover was in legacy xapic mode, check
      if it is capable of x2apic mode. And if we succeed in enabling
      Interrupt-remapping, then we can enable x2apic mode in the CPU.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: akpm@linux-foundation.org
      Cc: arjan@linux.intel.com
      Cc: andi@firstfloor.org
      Cc: ebiederm@xmission.com
      Cc: jbarnes@virtuousgeek.org
      Cc: steiner@sgi.com
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      6e1cb38a
    • S
      x64, x2apic/intr-remap: basic apic ops support · 1b374e4d
      Suresh Siddha 提交于
      Introduce basic apic operations which handle the apic programming. This
      will be used later to introduce another specific operations for x2apic.
      
      For the perfomance critial accesses like IPI's, EOI etc, we use the
      native operations as they are already referenced by different
      indirections like genapic, irq_chip etc.
      
      64bit Paravirt ops can also define their apic operations accordingly.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: akpm@linux-foundation.org
      Cc: arjan@linux.intel.com
      Cc: andi@firstfloor.org
      Cc: ebiederm@xmission.com
      Cc: jbarnes@virtuousgeek.org
      Cc: steiner@sgi.com
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1b374e4d
  22. 09 7月, 2008 2 次提交
  23. 08 7月, 2008 5 次提交