1. 07 8月, 2012 1 次提交
    • J
      ARM: OMAP3: igep0020: set GPIO mode for mux mcspi1_cs2 pin · a71eb61c
      Javier Martinez Canillas 提交于
      According to the IGEPv2 Rev.C data-sheet the LAN9221i pin 14 (IRQ) is
      connected to the OMAP3730 mcspi1_cs2 pin. Since this omap mux pin acts
      as an IRQ line, it has to be configured as an input GPIO.
      
      IGEPv2 platform code sets the smsc911x_cfg->gpio_irq to GPIO 176 but
      since the mux pin default mode is MODE7 (safe_mode) the driver fails
      when trying to register the IRQ with the following error message:
      
      [    1.994598] smsc911x: Driver version 2008-10-21
      [    3.704162] irq 272: nobody cared (try booting with the "irqpoll" option)
      [    3.711364] [<c001a114>] (unwind_backtrace+0x0/0xf0) from [<c009a0d4>] (__report_bad_irq+0x20/0xbc)
      [    3.720916] [<c009a0d4>] (__report_bad_irq+0x20/0xbc) from [<c009a41c>] (note_interrupt+0x1d8/0x238)
      [    3.730560] [<c009a41c>] (note_interrupt+0x1d8/0x238) from [<c0098234>] (handle_irq_event_percpu+0xc0/0x260)
      [    3.740936] [<c0098234>] (handle_irq_event_percpu+0xc0/0x260) from [<c0098410>] (handle_irq_event+0x3c/0x5c)
      [    3.751312] [<c0098410>] (handle_irq_event+0x3c/0x5c) from [<c009abe0>] (handle_level_irq+0xac/0x10c)
      [    3.761047] [<c009abe0>] (handle_level_irq+0xac/0x10c) from [<c0097a34>] (generic_handle_irq+0x30/0x48)
      [    3.770935] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4)
      [    3.780944] [<c02a6b74>] (gpio_irq_handler+0x180/0x1d4) from [<c0097a34>] (generic_handle_irq+0x30/0x48)
      [    3.790954] [<c0097a34>] (generic_handle_irq+0x30/0x48) from [<c0013e18>] (handle_IRQ+0x4c/0xac)
      [    3.800231] [<c0013e18>] (handle_IRQ+0x4c/0xac) from [<c000858c>] (omap3_intc_handle_irq+0x60/0x74)
      [    3.809783] [<c000858c>] (omap3_intc_handle_irq+0x60/0x74) from [<c04979e4>] (__irq_svc+0x44/0x60)
      [    3.819213] Exception stack(0xee42fde0 to 0xee42fe28)
      [    3.824554] fde0: 00000001 00000001 00000000 00000000 60000013 c06cce14 c06cce14 00000110
      [    3.833190] fe00: 00000000 c06ccdf4 60000013 ee41d000 fb058064 ee42fe28 c0089e08 c04976b4
      [    3.841796] fe20: 20000013 ffffffff
      [    3.845489] [<c04979e4>] (__irq_svc+0x44/0x60) from [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44)
      [    3.855499] [<c04976b4>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0099744>] (__setup_irq+0x1b8/0x3f0)
      [    3.865875] [<c0099744>] (__setup_irq+0x1b8/0x3f0) from [<c0099a34>] (request_threaded_irq+0xb8/0x140)
      [    3.875701] [<c0099a34>] (request_threaded_irq+0xb8/0x140) from [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4)
      [    3.886260] [<c0487950>] (smsc911x_drv_probe+0x75c/0x11a4) from [<c02e9bcc>] (platform_drv_probe+0x18/0x1c)
      [    3.906707] [<c02e89b8>] (driver_probe_device+0x90/0x210) from [<c02e8bcc>] (__driver_attach+0x94/0x98)
      [    3.916625] [<c02e8bcc>] (__driver_attach+0x94/0x98) from [<c02e7298>] (bus_for_each_dev+0x50/0x7c)
      [    3.926177] [<c02e7298>] (bus_for_each_dev+0x50/0x7c) from [<c02e81d4>] (bus_add_driver+0x184/0x248)
      [    3.935821] [<c02e81d4>] (bus_add_driver+0x184/0x248) from [<c02e909c>] (driver_register+0x78/0x12c)
      [    3.945465] [<c02e909c>] (driver_register+0x78/0x12c) from [<c0008648>] (do_one_initcall+0x34/0x178)
      [    3.955108] [<c0008648>] (do_one_initcall+0x34/0x178) from [<c066e8f4>] (kernel_init+0xfc/0x1c0)
      [    3.964385] [<c066e8f4>] (kernel_init+0xfc/0x1c0) from [<c00140b0>] (kernel_thread_exit+0x0/0x8)
      [    3.973632] handlers:
      [    3.976043] [<c034e2cc>] smsc911x_irqhandler
      [    3.980560] Disabling IRQ #272
      Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
      Acked-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
      Tested-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a71eb61c
  2. 10 5月, 2012 2 次提交
  3. 09 5月, 2012 4 次提交
  4. 08 5月, 2012 1 次提交
  5. 04 4月, 2012 1 次提交
  6. 21 2月, 2012 1 次提交
    • T
      ARM: OMAP2+: Split omap2_hsmmc_init() to properly support I2C GPIO pins · 3b972bf0
      Tony Lindgren 提交于
      Otherwise omap_device_build() and omap_mux related functions
      can't be marked as __init when twl is build as a module.
      
      If a board is using GPIO pins or regulators configured by an
      external chip, such as TWL PMIC on I2C bus, the board must
      mark those MMC controllers as deferred. Additionally both
      omap_hsmmc_init() and omap_hsmmc_late_init() must be called
      by the board.
      
      For MMC controllers using internal GPIO pins for card
      detect and regulators the slots don't need to be marked
      deferred. In this case calling omap_hsmmc_init() is sufficient.
      
      Only mark the MMC slots using gpio_cd or gpio_wd as deferred
      as noted by Igor Grinberg <grinberg@compulab.co.il>.
      
      Note that this patch does not change the behaviour for
      board-4430sdp.c board-omap4panda.c. These boards wrongly
      rely on the omap_hsmmc.c init function callback to configure
      the PMIC GPIO interrupt lines on external chip. If the PMIC
      interrupt lines are not configured during init, they will
      fail.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      3b972bf0
  7. 05 1月, 2012 1 次提交
  8. 18 11月, 2011 1 次提交
  9. 16 11月, 2011 1 次提交
  10. 30 9月, 2011 2 次提交
  11. 24 8月, 2011 2 次提交
    • T
      ARM: OMAP: Introduce SoC specific early_init · 8f5b5a41
      Tony Lindgren 提交于
      Introduce them for each omap variant and just make them all call
      omap2_init_common_infrastructure for now. Do this for each board-*.c
      file except for board-generic and board-omap3beagle as they use
      the same machine ID for multiple SoCs.
      
      No functional changes.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      8f5b5a41
    • T
      ARM: OMAP: Move omap2_init_common_devices out of init_early · a4ca9dbe
      Tony Lindgren 提交于
      There's no need to call omap2_init_common_devices from init_early.
      
      It no longer does anything else except reprogram the memory timings
      for some boards, so it's better to do it later so we have a chance
      to get console messages if something goes wrong.
      
      Move it to happen after omap_serial_init gets called. And while
      patching it anyways, rename it to omap_sdrc_init as suggested by
      Benoit Cousson <b-cousson@ti.com>.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a4ca9dbe
  12. 22 8月, 2011 1 次提交
  13. 04 7月, 2011 2 次提交
  14. 20 6月, 2011 1 次提交
    • T
      omap: Set separate timer init functions to avoid cpu_is_omap tests · e74984e4
      Tony Lindgren 提交于
      This is needed for the following patches so we can initialize the
      rest of the hardware timers later on.
      
      As with the init_irq calls, there's no need to do cpu_is_omap calls
      during the timer init as we only care about the major omap generation.
      This means that we can initialize the sys_timer with the .timer
      entries alone.
      
      Note that for now we just set stubs for the various sys_timer entries
      that will get populated in a later patch. The following patches will
      also remove the omap_dm_timer_init calls and change the init for the
      rest of the hardware timers to happen with an arch_initcall.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      e74984e4
  15. 16 6月, 2011 1 次提交
  16. 14 6月, 2011 1 次提交
  17. 17 5月, 2011 3 次提交
  18. 12 5月, 2011 1 次提交
  19. 11 5月, 2011 2 次提交
  20. 09 5月, 2011 1 次提交
  21. 03 5月, 2011 1 次提交
  22. 20 4月, 2011 1 次提交
  23. 31 3月, 2011 1 次提交
  24. 11 3月, 2011 1 次提交
  25. 03 3月, 2011 1 次提交
  26. 02 3月, 2011 1 次提交
  27. 01 3月, 2011 2 次提交
  28. 23 2月, 2011 2 次提交