1. 10 7月, 2012 1 次提交
  2. 29 3月, 2012 1 次提交
  3. 05 12月, 2011 2 次提交
  4. 18 3月, 2011 1 次提交
  5. 11 9月, 2010 2 次提交
  6. 21 7月, 2010 1 次提交
  7. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  8. 17 2月, 2010 1 次提交
  9. 16 2月, 2010 1 次提交
  10. 02 2月, 2010 1 次提交
    • E
      x86, mtrr: Constify struct mtrr_ops · 3b9cfc0a
      Emese Revfy 提交于
      This is part of the ops structure constification
      effort started by Arjan van de Ven et al.
      
      Benefits of this constification:
      
       * prevents modification of data that is shared
         (referenced) by many other structure instances
         at runtime
      
       * detects/prevents accidental (but not intentional)
         modification attempts on archs that enforce
         read-only kernel data at runtime
      
       * potentially better optimized code as the compiler
         can assume that the const data cannot be changed
      
       * the compiler/linker move const data into .rodata
         and therefore exclude them from false sharing
      Signed-off-by: NEmese Revfy <re.emese@gmail.com>
      LKML-Reference: <4B65D712.3080804@gmail.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      3b9cfc0a
  11. 04 7月, 2009 1 次提交
    • J
      x86: Clean up mtrr/generic.c · a1a499a3
      Jaswinder Singh Rajput 提交于
      Fix following trivial style problems:
      
        ERROR: trailing whitespace X 4
        WARNING: Use #include <linux/io.h> instead of <asm/io.h>
        WARNING: braces {} are not necessary for single statement blocks X 3
        ERROR: "foo * bar" should be "foo *bar"
        WARNING: line over 80 characters X 6
        ERROR: "foo * bar" should be "foo *bar"
        ERROR: spaces required around that '=' (ctx:VxO)
        ERROR: space required before that '-' (ctx:OxV)
        WARNING: suspect code indent for conditional statements (8, 12)
        ERROR: spaces required around that '=' (ctx:VxV)
        ERROR: do not initialise statics to 0 or NULL
        ERROR: space prohibited after that open parenthesis '(' X 2
        ERROR: space prohibited before that close parenthesis ')' X 2
        ERROR: trailing statements should be on next line
        ERROR: return is not a function, parentheses are not required
      
      Also use pr_debug and pr_warning where possible.
      
      arch/x86/kernel/cpu/mtrr/generic.o:
      
         text	   data	    bss	    dec	    hex	filename
         5652	     77	   4224	   9953	   26e1	generic.o.before
         5652	     77	   4220	   9949	   26dd	generic.o.after
      
      The md5 changed:
         b34d6c045f06daa4ed092b90cc760e8f  generic.o.before.asm
         a490c6251cfd8442fbffecc0e09a573d  generic.o.after.asm
      
      Because mtrr_state moved from data to bss, changing its
      offsets - and also because __LINE__ numbers changed.
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Further cleanups to make the code more consistent ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a1a499a3
  12. 15 5月, 2009 5 次提交
  13. 11 5月, 2009 1 次提交
    • Y
      x86: mtrr: Fix high_width computation when phys-addr is >= 44bit · 917a0153
      Yinghai Lu 提交于
      found one system where cpu address line is 44bits, mtrr printout
      is not right:
      
       [    0.000000] MTRR variable ranges enabled:
       [    0.000000]   0 base 0   00000000 mask FF0 00000000 write-back
       [    0.000000]   1 base 10  00000000 mask FFF 80000000 write-back
       [    0.000000]   2 base 0   80000000 mask FFF 80000000 uncachable
       [    0.000000]   3 base 0   7F800000 mask FFF FF800000 uncachable
      
      Li Zefan and Frederic pointed out the high_width could be -4 some how.
      
      It turns out when phys_addr is 44bit, size_or_mask will be
      ffffffff,00000000 so ffs(size_or_mask) will be 0.
      
      Try to check low 32 bit, to get correct high_width.
      Signed-off-by: NYinghai Lu <yinghai@kerne.org>
      Also-analyzed-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Also-analyzed-by: NLi Zefan <lizf@cn.fujitsu.com>
      Cc: Jeremy Fitzhardinge <jeremy@goop.org>
      Cc: Zhaolei <zhaolei@cn.fujitsu.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Vegard Nossum <vegard.nossum@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <4A026540.8060504@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      917a0153
  14. 04 4月, 2009 1 次提交
    • I
      x86, mtrr: remove debug message · c5c67c7c
      Ingo Molnar 提交于
      The MTRR code grew a new debug message which triggers commonly:
      
      [   40.142276]   get_mtrr: cpu0 reg00 base=0000000000 size=0000080000 write-back
      [   40.142280]   get_mtrr: cpu0 reg01 base=0000080000 size=0000040000 write-back
      [   40.142284]   get_mtrr: cpu0 reg02 base=0000100000 size=0000040000 write-back
      [   40.142311]   get_mtrr: cpu0 reg00 base=0000000000 size=0000080000 write-back
      [   40.142314]   get_mtrr: cpu0 reg01 base=0000080000 size=0000040000 write-back
      [   40.142317]   get_mtrr: cpu0 reg02 base=0000100000 size=0000040000 write-back
      
      Remove this annoyance.
      Reported-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c5c67c7c
  15. 14 3月, 2009 2 次提交
  16. 13 3月, 2009 2 次提交
    • A
      x86: mtrr: don't modify RdDram/WrDram bits of fixed MTRRs · 3ff42da5
      Andreas Herrmann 提交于
      Impact: bug fix + BIOS workaround
      
      BIOS is expected to clear the SYSCFG[MtrrFixDramModEn] on AMD CPUs
      after fixed MTRRs are configured.
      
      Some BIOSes do not clear SYSCFG[MtrrFixDramModEn] on BP (and on APs).
      
      This can lead to obfuscation in Linux when this bit is not cleared on
      BP but cleared on APs. A consequence of this is that the saved
      fixed-MTRR state (from BP) differs from the fixed-MTRRs of APs --
      because RdDram/WrDram bits are read as zero when
      SYSCFG[MtrrFixDramModEn] is cleared -- and Linux tries to sync
      fixed-MTRR state from BP to AP. This implies that Linux sets
      SYSCFG[MtrrFixDramEn] and activates those bits.
      
      More important is that (some) systems change these bits in SMM when
      ACPI is enabled. Hence it is racy if Linux modifies RdMem/WrMem bits,
      too.
      
      (1) The patch modifies an old fix from Bernhard Kaindl to get
          suspend/resume working on some Acer Laptops. Bernhard's patch
          tried to sync RdMem/WrMem bits of fixed MTRR registers and that
          helped on those old Laptops. (Don't ask me why -- can't test it
          myself). But this old problem was not the motivation for the
          patch. (See http://lkml.org/lkml/2007/4/3/110)
      
      (2) The more important effect is to fix issues on some more current systems.
      
          On those systems Linux panics or just freezes, see
      
          http://bugzilla.kernel.org/show_bug.cgi?id=11541
          (and also duplicates of this bug:
          http://bugzilla.kernel.org/show_bug.cgi?id=11737
          http://bugzilla.kernel.org/show_bug.cgi?id=11714)
      
          The affected systems boot only using acpi=ht, acpi=off or
          when the kernel is built with CONFIG_MTRR=n.
      
          The acpi options prevent full enablement of ACPI.  Obviously when
          ACPI is enabled the BIOS/SMM modfies RdMem/WrMem bits.  When
          CONFIG_MTRR=y Linux also accesses and modifies those bits when it
          needs to sync fixed-MTRRs across cores (Bernhard's fix, see (1)).
          How do you synchronize that? You can't. As a consequence Linux
          shouldn't touch those bits at all (Rationale are AMD's BKDGs which
          recommend to clear the bit that makes RdMem/WrMem accessible).
          This is the purpose of this patch. And (so far) this suffices to
          fix (1) and (2).
      
      I suggest not to touch RdDram/WrDram bits of fixed-MTRRs and
      SYSCFG[MtrrFixDramEn] and to clear SYSCFG[MtrrFixDramModEn] as
      suggested by AMD K8, and AMD family 10h/11h BKDGs.
      BIOS is expected to do this anyway. This should avoid that
      Linux and SMM tread on each other's toes ...
      Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
      Cc: trenn@suse.de
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090312163937.GH20716@alberich.amd.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3ff42da5
    • Y
      x86: more MTRR debug printouts · 8ad97905
      Yinghai Lu 提交于
      Impact: improve MTRR debugging messages
      
      There's still inefficiencies suspected with the MTRR sanitizing
      code, so make sure we get all the info we need from a dmesg.
      
      - Remove unneeded mtrr_show
      
       (It will only printout one time by first cpu, so it is no big deal.)
      
      - Also print out directly from get_mtrr, because it doesn't update mtrr_state.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <49B9BA5A.40108@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8ad97905
  17. 21 1月, 2009 1 次提交
  18. 31 12月, 2008 2 次提交
  19. 22 9月, 2008 1 次提交
  20. 22 8月, 2008 2 次提交
    • I
      x86: work around MTRR mask setting, v2 · 9754a5b8
      Ingo Molnar 提交于
      improve the debug printout:
      
      - make it actually display something
      - print it only once
      
      would be nice to have a WARN_ONCE() facility, to feed such things to
      kerneloops.org.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9754a5b8
    • Y
      x86: work around MTRR mask setting · 38cc1c3d
      Yinghai Lu 提交于
      Joshua Hoblitt reported that only 3 GB of his 16 GB of RAM is
      usable. Booting with mtrr_show showed us the BIOS-initialized
      MTRR settings - which are all wrong.
      
      So the root cause is that the BIOS has not set the mask correctly:
      
      >               [    0.429971]  MSR00000200: 00000000d0000000
      >               [    0.433305]  MSR00000201: 0000000ff0000800
      > should be ==> [    0.433305]  MSR00000201: 0000003ff0000800
      >
      >               [    0.436638]  MSR00000202: 00000000e0000000
      >               [    0.439971]  MSR00000203: 0000000fe0000800
      > should be ==> [    0.439971]  MSR00000203: 0000003fe0000800
      >
      >               [    0.443304]  MSR00000204: 0000000000000006
      >               [    0.446637]  MSR00000205: 0000000c00000800
      > should be ==> [    0.446637]  MSR00000205: 0000003c00000800
      >
      >               [    0.449970]  MSR00000206: 0000000400000006
      >               [    0.453303]  MSR00000207: 0000000fe0000800
      > should be ==> [    0.453303]  MSR00000207: 0000003fe0000800
      >
      >               [    0.456636]  MSR00000208: 0000000420000006
      >               [    0.459970]  MSR00000209: 0000000ff0000800
      > should be ==> [    0.459970]  MSR00000209: 0000003ff0000800
      
      So detect this borkage and add the prefix 111.
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      38cc1c3d
  21. 25 5月, 2008 4 次提交
  22. 29 4月, 2008 1 次提交
  23. 17 4月, 2008 3 次提交
  24. 27 3月, 2008 1 次提交
  25. 30 1月, 2008 1 次提交
    • J
      x86, 32-bit: trim memory not covered by wb mtrrs · 99fc8d42
      Jesse Barnes 提交于
      On some machines, buggy BIOSes don't properly setup WB MTRRs to cover all
      available RAM, meaning the last few megs (or even gigs) of memory will be
      marked uncached.  Since Linux tends to allocate from high memory addresses
      first, this causes the machine to be unusably slow as soon as the kernel
      starts really using memory (i.e.  right around init time).
      
      This patch works around the problem by scanning the MTRRs at boot and
      figuring out whether the current end_pfn value (setup by early e820 code)
      goes beyond the highest WB MTRR range, and if so, trimming it to match.  A
      fairly obnoxious KERN_WARNING is printed too, letting the user know that
      not all of their memory is available due to a likely BIOS bug.
      
      Something similar could be done on i386 if needed, but the boot ordering
      would be slightly different, since the MTRR code on i386 depends on the
      boot_cpu_data structure being setup.
      
      This patch fixes a bug in the last patch that caused the code to run on
      non-Intel machines (AMD machines apparently don't need it and it's untested
      on other non-Intel machines, so best keep it off).
      
      Further enhancements and fixes from:
      
        Yinghai Lu <Yinghai.Lu@Sun.COM>
        Andi Kleen <ak@suse.de>
      Signed-off-by: NJesse Barnes <jesse.barnes@intel.com>
      Tested-by: NJustin Piszcz <jpiszcz@lucidpixels.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: "Eric W. Biederman" <ebiederm@xmission.com>
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      99fc8d42