This patch enables the interrupt generation for SDIO IRQs
of the sdhi controllers of the SoC. To make sure interrupt
are handled announce the MMC_CAP_SDIO_IRQ capability
on ecovec, kfr2r09 and se7724.

Tested with a b43-based SDIO wireless card on ecovec.
Signed-off-by: NArnd Hannemann <arnd@arndnet.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>

The x86 fixmaps need to be all together... unfortunately the
VRTC one was misplaced.

This patch makes sure the MRST VRTC fixmap is put prior to the
__end_of_permanent_fixed_addresses marker.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
Signed-off-by: NAlan Cox <alan@linux.intel.com>
LKML-Reference: <20110111105544.24448.27607.stgit@bob.linux.org.uk>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

We need this for x86 MID platforms where GPIO interrupts are
used. No special magic is needed so the default 1:1 behaviour
will do nicely.
Signed-off-by: NAlek Du <alek.du@intel.com>
Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com>
Signed-off-by: NAlan Cox <alan@linux.intel.com>
LKML-Reference: <20110111105439.24448.69863.stgit@bob.linux.org.uk>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Westmere processors use a different algorithm for
assigning APICIDs on SGI UV systems. The location of the
node number within the apicid is now a function of the
processor type.
Signed-off-by: NJack Steiner <steiner@sgi.com>
LKML-Reference: <20110110195210.GA18737@sgi.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

While both methods should work equivalently well for the native
case, the Xen Dom0 case can't reliably work with the MSR one,
since there's no guarantee that the virtual CPUs it has
available fully cover all necessary physical ones.

As per the suggestion of Robert Richter the patch only adds the
PCI method, but leaves the MSR one as a fallback to cover new
systems the PCI IDs of which may not have got added to the code
base yet.

The only change in v2 is the breaking out of the new CPI
initialization method into a separate function, as requested by
Ingo.
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Acked-by: NRobert Richter <robert.richter@amd.com>
Cc: Andreas Herrmann3 <Andreas.Herrmann3@amd.com>
Cc: Joerg Roedel <joerg.roedel@amd.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
LKML-Reference: <4D2B3FD7020000780002B67D@vpn.id2.novell.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

commit a8760eca (x86: Check tsc available/disabled in the delayed init
function) missed to prevent the setup of the delayed init function in
case the initial tsc calibration failed. This results in the same
divide by zero bug as we have seen without the tsc disabled check.

Skip the delayed work setup when tsc_khz (the initial calibration
value) is 0.
Bisected-and-tested-by: NKirill A. Shutemov <kas@openvz.org>
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The header asm/hvcall.h was previously included indirectly via
smp.h. On non-SMP systems, however, these declarations are excluded
and the build breaks. This is easily fixed by including asm/hvcall.h
directly.

The VPHN feature is only meaningful on NUMA systems that implement
the SPLPAR option, so exclude the VPHN code on systems without
SPLPAR enabled.

Also, expose unmap_cpu_from_node() on systems with SPLPAR enabled,
even if CONFIG_HOTPLUG_CPU is disabled.

Lastly, map_cpu_to_node() is now needed by VPHN to manipulate the
node masks after boot time, so remove the __cpuinit annotation to
fix a section mismatch.
Signed-off-by: NJesse Larrew <jlarrew@linux.vnet.ibm.com>

Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>

Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
[Modified to hit the right file]
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>

Dynamically detect the DBx500 SOC an revision based on the ASIC ID.
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>

Rename the MOP board Kconfig entries to the same name as the machine
type, so that the machine_is_*() macros work correctly.
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
[Updated to match changes in the tree]
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>

To allow the possiblity of building U8500 and U5500 support in the same
image.
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
[Rebased to latest changes in Russells tree]
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>

Remove kobject.h from files which don't need it, notably,
sched.h and fs.h.
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Xen does not currently expose PV-NUMA information to PV
guests. Therefore disable NUMA for the time being to prevent the
kernel picking up on an host-level NUMA information which it might
come across in the firmware.

[ Added comment - Jeremy ]
Signed-off-by: NIan Campbell <ian.campbell@citrix.com>
Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>

Encoding the cpu family name apparently confuses people when they try to
boot an image on a sub-variant, so encode the specific cpu name and the
silicon rev instead.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When unmasking a GPIO interrupt on a BF54x part, the code will implicitly
ack any pending interrupts.  This is not what unmasking should do and can
cause people to miss interrupts from their devices, so punt the code.
Reported-by: NRutger Hofman <rutger@cs.vu.nl>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

If there was an error in the lower free functions, we need to pass that
back up so the calling process is able to check things.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NAndreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

On bf518-ezbrd with DSA Ethernet switch enabled, on chip MAC is
connecting to phy at address 3.  If allowing the netdevice framework to
probe both 3 phys of the switch when registering MAC phy, phy at address
1 is checked for link active status other than phy at address 3.  If
connecting a cable to port 2 and leave port 1 open, link status in phy
2 and 3 are online, while that in phy 1 is offline.  So, the phy layer
sets wrong offline status to net device on port 3.  In this case, no data
can be transferred via ethernet port 2.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Common code now invokes the linker directly which causes build failures
when using an FDPIC toolchain.  So move the emulation setting out of the
module-specific LDFLAGS and into the common LDFLAGS.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We check its value at runtime, so we want to avoid garbage across runs.
Signed-off-by: NVivi Li <vivi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Otherwise, gdb continue operation after a breakpoint is hit may trap
into endless breakpoint.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When ADEOS and kgdb are both enabled, single step in linux kernel may be
scheduled to Xenomai core after return from interrupt handlers.  This
blocks gdb continue operation after a break point is hit.  So, disable
interrupt when running gdb single step.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When run kgdb testing, it looks like coreb hangs in single step or trap
exception without handling anomaly 05000257 properly on bf561 v0.5.  But,
the anomaly list says it apply to bf561 v0.4 and bellow.  Apply its work
around to 0.5 temporarily until the behavior and the root cause can be
confirmed by the hardware team.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The low level assembly needs to use the pseudo_long_call helper so that
we use the right call insn when doing kernel XIP.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

KGDB single step in SMP kernel may hang forever in flushinv without a
CSYNC ahead.  This is because the core internal write buffers need to
be flushed before invalidating the data cache to make sure the insn
fetch is not out of sync.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The SPORT/UART driver doesn't use the secondary channel pins, so don't
try and request them thus keeping other drivers from using them.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

platfrom -> platform

This changes a struct name. The related code is conditionally
compiled and won't work because the include file linux/gpio-decoder.h
is missing, so removing this code would be an even better solution.

If the missing include file is added, it must fix the spelling, too.
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When using an uncached DMA region less than 1 MiB, we try to mask off
the whole last 1 MiB for it.  Unfortunately, this fails as we forgot
to subtract one from the calculated mask, leading to the region still
be marked as cacheable.
Reported-by: NAndrew Rook <andrew.rook@speakerbus.co.uk>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Since linux-2.6.31, the kernel suspend framework will do disable_irq/enable_irq,
so save/restore irq in standby and suspend to mem callback should be dropped.
Otherwise the common code notices things are enabled and complains.
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Any consumer of dpmc.h expects to use VR_CTL, so also pull in the new
mach/pll.h header for those functions.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Currently, sending an interprocessor interrupt (IPI) requires building up
a message dynamically which means memory allocation.  But often times, we
will want to send an IPI in low level contexts where allocation is not
possible which may lead to a panic().  So create a per-cpu static array
for the message queue and use that instead.

Further, while we have two supplemental interrupts, we are currently only
using one of them.  So use the second one for the most common IPI message
of all -- smp_send_reschedule().  This avoids ugly contention for locks
which in turn would require an IPI message ...

In general, this improves SMP performance, and in some cases allows the
SMP port to work in places it wouldn't before.  Such as the PREEMPT_RT
state where the slab is protected by a per-cpu spin lock.  If the slab
kmalloc/kfree were to put the task to sleep, and that task was actually
the IPI handler, then the system falls down yet again.

After running some various stress tests on the system, the static limit
of 5 messages seems to work.  On the off chance even this overflows, we
simply panic(), and we can review that scenario to see if the limit needs
to be increased a bit more.
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Since we're breaking apart some inter-header dependencies to avoid more
circular loops, move the blackfin_core_id() definition to the func that
it is based upon.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The SMP code needs "asmlinkage" which linkage.h provides.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>