1. 18 12月, 2012 1 次提交
    • T
      ARM: OMAP: Split fb.c to remove last remaining cpu_is_omap usage · 16d60bb8
      Tony Lindgren 提交于
      Looks like we missed plat-omap/fb.c for cpu_is_omap usage
      mach-omap2. This is the last user of cpu_is_omap, so let's
      quickly fix it up so we can finally remove plat/cpu.h for
      omap2lus.
      
      We want to limit cpu_is_omap macro usage to mach-omap2 only so
      we can make plat/cpu.h private. After this we can finally drop
      plat/cpu.h for omap2+.
      
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      16d60bb8
  2. 21 11月, 2012 1 次提交
  3. 15 11月, 2012 1 次提交
  4. 13 11月, 2012 1 次提交
  5. 09 11月, 2012 2 次提交
  6. 08 11月, 2012 1 次提交
    • T
      OMAP: panda: move display init from board file to dss-common.c · 0191bf36
      Tomi Valkeinen 提交于
      Device tree support for omapdss is still some way in the future.  In an
      effort to get a minimal DSS support for DT enabled kernel on selected
      OMAP4 boards, we'll go for a temporary solution: We will call the same
      non-DT omapdss setup code for OMAP4 SDP and Pandaboards from
      board-generic.c, thus enabling DSS for those boards.
      
      This patch moves the display setup code from board-omap4panda.c to
      dss-common.c. dss-common.c will be called by the board-omap4panda.c when
      running on non-DT kernel, and by board-generic.c when running on DT
      enabled kernel.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      0191bf36
  7. 01 11月, 2012 2 次提交
  8. 21 10月, 2012 5 次提交
  9. 18 10月, 2012 1 次提交
  10. 24 9月, 2012 1 次提交
    • J
      ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMOD · ee75d95c
      Jon Hunter 提交于
      Convert OMAP2/3 devices to use HWMOD for creating a PMU device. To support PMU
      on OMAP2 devices we only need to use MPU sub-system and so we can simply use
      the MPU HWMOD to create the PMU device. To support PMU on OMAP3 devices, we need
      to use the MPU and DEBUG sub-systems and so use these HWMODs to create the PMU
      device for OMAP3.
      
      The MPU HWMOD for OMAP2/3 devices is currently missing the PMU interrupt and so
      add the PMU interrupt to the MPU HWMOD for these devices.
      
      This change also moves the PMU code out of the mach-omap2/devices.c files into
      its own pmu.c file as suggested by Kevin Hilman to de-clutter devices.c.
      
      Cc: Ming Lei <ming.lei@canonical.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      [paul@pwsan.com: fixed checkpatch messages; updated to apply; dropped old-style
       initial filename line in header comments]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      ee75d95c
  11. 19 9月, 2012 1 次提交
  12. 12 9月, 2012 7 次提交
  13. 31 8月, 2012 1 次提交
  14. 09 7月, 2012 2 次提交
  15. 05 7月, 2012 2 次提交
    • V
      ARM: OMAP2+: Remove unnecessary ifdef around __omap2_set_globals · ecc46cfd
      Vaibhav Hiremath 提交于
      The function __omap2_set_globals() can be common across all
      platforms/architectures, even in case of omap4, internally it
      calls same set of functions as in __omap2_set_globals() function
      (except for sdrc).
      This patch adds new config flag SOC_HAS_OMAP2_SDRC to handle sdrc,
      so that we can reuse same function across omap2/3/4...
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ecc46cfd
    • V
      ARM: OMAP2+: am33xx: Make am33xx as a separate class · 1c213ba1
      Vaibhav Hiremath 提交于
      Initially, we decided to make am33xx family of device to fall
      under omap3 class (cpu_is_omap34xx() = true), since it carries
      Cortex-A8 core. But while adding complete baseport support
      (like, clock, power and hwmod) support, it is observed that,
      we are creating more and more problems by treating am33xx device
      as omap3 family, as nothing matches between them
      (except cortex-A8 mpu).
      
      So,  after long discussion we have came to the conclusion that,
      we should not consider am33xx device as omap3 family, instead
      create separate class (SOC_AM33XX) under OMAP2PLUS.
      This means, for am33xx device, cpu_is_omap34xx() will return false,
      and only cpu_is_am33xx() will be true.
      
      Please refer to the link below, for mailing-list discussion on this -
      
      http://www.spinics.net/lists/linux-omap/msg69439.htmlSigned-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      [tony@atomide.com: fixed typo, updated for soc_is changes]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      1c213ba1
  16. 02 7月, 2012 1 次提交
  17. 30 6月, 2012 1 次提交
    • V
      ARM: OMAP3+: clock33xx: Add AM33XX clock tree data · e30384ab
      Vaibhav Hiremath 提交于
      AM33XX clock implementation is different than any existing OMAP
      family of devices. Although DPLL module is similar to OMAP4
      device, but the usage is very much different than OMAP4.
      AM33XX has different peripheral set and each module gets
      integrated to the clock framework differently than OMAP
      family of devices.
      
      This patch adds full Clock tree data for AM33XX family
      of devices and also integrates it into existing OMAP framework.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      CC: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: updated to apply; changed 'soc_is_am33xx' to
       'cpu_is_am33xx' to match usage in Tony's current am33xx branch]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e30384ab
  18. 20 6月, 2012 2 次提交
  19. 19 6月, 2012 4 次提交
    • V
      ARM: OMAP AM33xx: clockdomains: Add clockdomain data and respective operations · 9c80f3aa
      Vaibhav Hiremath 提交于
      AM33XX PRCM module consists of various clockdomains, in all
      total we have 18 clockdomains available, with following
      controlling options,
         - SW Sleep: sw forced sleep transition
         - SW Wakeup: sw forced wakeup transition
      
      This patch adds all available clockdomain data, respective
      clockdomain operations for AM33XX family of device, and also
      integrates it into existing OMAP framework.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      CC: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: removed CLKDM_NO_AUTODEPS from clockdomain flags, removed
       unnecessary .clktrctrl_offs field; updated for 3.5]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      9c80f3aa
    • V
      ARM: OMAP AM33xx: powerdomains: add AM335x support · 3f0ea764
      Vaibhav Hiremath 提交于
      Add offset & mask fields to struct powerdomain
      
      In case of AM33xx family of devices, there is no consistency between
      PWRSTCTRL & PWRSTST register offsers in PRM space, for example -
      
      PRM_XXX           PWRSTCTRL     PWRSTST
      =======================================
      PRM_PER_MOD:      0x0C,         0x08
      PRM_WKUP_MOD:     0x04,         0x08
      PRM_MPU_MOD:      0x00,         0x04
      PRM_DEVICE_MOD:   NA,           NA
      
      And also, there is no consistency between bit-offsets inside
      PWRSTCTRL & PWRSTST register, for example -
      
      PRM_XXX           LOGICRET  MEMON  MEMRET
      =======================================
      GFX_PWRCTRL:      2,        17,    6
      PER_PWRCTRL:      3,        25,    29
      MPU_PWRCTRL:      2,        18,    22
      WKUP_PWRCTRL:     3,        NA,    NA
      
      This means, we need to maintain and pass on all this information
      in powerdomain handle; so adding fields for,
         - PWRSTCTRL/ST register offset
         - Logic retention state mask
         - mem_on/ret/pwrst/retst mask
      
      Currently, this fields is only applicable and used for AM33XX devices.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: this patch is a combination of "Add offset & mask fields to
       struct powerdomain" and the powerdomain portions of "ARM: OMAP3+: am33xx:
       Add powerdomain & PRM support"; updated for 3.5]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      3f0ea764
    • V
      ARM: OMAP AM33xx: CM: Introduce AM33xx CM APIs and register level details · f969a6dc
      Vaibhav Hiremath 提交于
      As far as PRM/CM/PRCM modules are concerned, AM33XX device is
      different than OMAP3 and OMAP4 architectures; so similar to
      PRM implementation, handle AM33XX CM separately.
      
      This patch introduces AM33XX CM module low-level api's, used and
      required by omap clockdomain and hwmod framework.
      
      Please note that cm-regbits-33xx.h (register bit field offset)
      and cm33xx.h (register addr offset) files are mostly auto generated.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      CC: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: split the hwmod code changes in this patch into a separate
       patch; updated for 3.5]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      f969a6dc
    • V
      ARM: OMAP AM33xx: PRM: add PRM support · ddd04b98
      Vaibhav Hiremath 提交于
      As far as PRM/CM/PRCM modules are concerned, AM33XX device is
      different than OMAP3 and OMAP4 architectures; so we need to handle it
      separately.  This patch adds support for the PRM APIs required for
      AM33XX device.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NAfzal Mohammed <afzal@ti.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: separated the PRM parts of "ARM: OMAP3+: am33xx: Add
       powerdomain & PRM support" into this patch; fixed Makefile prm33xx.o
       location; cleaned up some checkpatch violations; updated for 3.5]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      ddd04b98
  20. 18 6月, 2012 1 次提交
  21. 04 6月, 2012 1 次提交
    • T
      ARM: OMAP2: Remove legacy USB FS support · fe57ab06
      Tony Lindgren 提交于
      The FS (Full Speed) USB controller is available on 2420 and 2430,
      but not being used.
      
      Out of the 2420 based boards only Nokia N8X0 are seeing active
      development and they have external HS (High Speed) TUSB controller.
      On omap 2430sdp there is MUSB HS controller, so there's no need
      to use the legacy USB FS controller.
      
      That leaves only H4 and Apollon boards that could use the FS USB
      controller. As both H4 and Apollon boards are old proprietary
      development boards, it's unlikely that we have any active
      developers working on those boards using the USB.
      
      So remove the FS USB support for omap2 machines. Patches are
      welcome if somebody wants to instead fix it all up to the
      current standards.
      
      Cc: linux-usb@vger.kernel.org
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Acked-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      fe57ab06
  22. 01 6月, 2012 1 次提交