1. 27 3月, 2012 2 次提交
  2. 22 3月, 2012 13 次提交
  3. 09 2月, 2012 1 次提交
  4. 08 2月, 2012 1 次提交
  5. 24 1月, 2012 3 次提交
  6. 21 1月, 2012 4 次提交
  7. 20 1月, 2012 2 次提交
  8. 18 1月, 2012 3 次提交
  9. 17 1月, 2012 11 次提交
    • T
      3333ea78
    • L
      ACPI: processor: fix acpi_get_cpuid for UP processor · d640113f
      Lin Ming 提交于
      For UP processor, it is likely that no _MAT method or MADT table defined.
      So currently acpi_get_cpuid(...) always return -1 for UP processor.
      This is wrong. It should return valid value for CPU0.
      
      In the other hand, BIOS may define multiple CPU handles even for UP
      processor, for example
      
              Scope (_PR)
              {
                  Processor (CPU0, 0x00, 0x00000410, 0x06) {}
                  Processor (CPU1, 0x01, 0x00000410, 0x06) {}
                  Processor (CPU2, 0x02, 0x00000410, 0x06) {}
                  Processor (CPU3, 0x03, 0x00000410, 0x06) {}
              }
      
      We should only return valid value for CPU0's acpi handle.
      And return invalid value for others.
      
      http://marc.info/?t=132329819900003&r=1&w=2
      
      Cc: stable@vger.kernel.org
      Reported-and-tested-by: wallak@free.fr
      Signed-off-by: NLin Ming <ming.m.lin@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      d640113f
    • M
      ACPI APEI: Convert atomicio routines · 700130b4
      Myron Stowe 提交于
      APEI needs memory access in interrupt context.  The obvious choice is
      acpi_read(), but originally it couldn't be used in interrupt context
      because it makes temporary mappings with ioremap().  Therefore, we added
      drivers/acpi/atomicio.c, which provides:
          acpi_pre_map_gar()     -- ioremap in process context
      	acpi_atomic_read()     -- memory access in interrupt context
      	acpi_post_unmap_gar()  -- iounmap
      
      Later we added acpi_os_map_generic_address() (29718521) and enhanced
      acpi_read() so it works in interrupt context as long as the address has
      been previously mapped (620242ae).  Now this sequence:
          acpi_os_map_generic_address()    -- ioremap in process context
          acpi_read()/apei_read()          -- now OK in interrupt context
          acpi_os_unmap_generic_address()
      is equivalent to what atomicio.c provides.
      
      This patch introduces apei_read() and apei_write(), which currently are
      functional equivalents of acpi_read() and acpi_write().  This is mainly
      proactive, to prevent APEI breakages if acpi_read() and acpi_write()
      are ever augmented to support the 'bit_offset' field of GAS, as APEI's
      __apei_exec_write_register() precludes splitting up functionality
      related to 'bit_offset' and APEI's 'mask' (see its
      APEI_EXEC_PRESERVE_REGISTER block).
      
      With apei_read() and apei_write() in place, usages of atomicio routines
      are converted to apei_read()/apei_write() and existing calls within
      osl.c and the CA, based on the re-factoring that was done in an earlier
      patch series - http://marc.info/?l=linux-acpi&m=128769263327206&w=2:
          acpi_pre_map_gar()     -->  acpi_os_map_generic_address()
          acpi_post_unmap_gar()  -->  acpi_os_unmap_generic_address()
          acpi_atomic_read()     -->  apei_read()
          acpi_atomic_write()    -->  apei_write()
      
      Note that acpi_read() and acpi_write() currently use 'bit_width'
      for accessing GARs which seems incorrect.  'bit_width' is the size of
      the register, while 'access_width' is the size of the access the
      processor must generate on the bus.  The 'access_width' may be larger,
      for example, if the hardware only supports 32-bit or 64-bit reads.  I
      wanted to minimize any possible impacts with this patch series so I
      did *not* change this behavior.
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      700130b4
    • M
      ACPI: Export interfaces for ioremapping/iounmapping ACPI registers · 6f68c91c
      Myron Stowe 提交于
      Export remapping and unmapping interfaces - acpi_os_map_generic_address()
      and acpi_os_unmap_generic_address() - for ACPI generic registers that are
      backed by memory mapped I/O (MMIO).
      
      The acpi_os_map_generic_address() and acpi_os_unmap_generic_address()
      declarations may more properly belong in include/acpi/acpiosxf.h next to
      acpi_os_read_memory() but I believe that would require the ACPI CA making
      them an official part of the ACPI CA - OS interface.
      
      ACPI Generic Address Structure (GAS) reference (ACPI's fixed/generic
      hardware registers use the GAS format):
        ACPI Specification, Revision 4.0, Section 5.2.3.1, "Generic Address
        Structure"
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Acked-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      6f68c91c
    • M
      ACPI: Fix possible alignment issues with GAS 'address' references · bc9ffce2
      Myron Stowe 提交于
      Generic Address Structures (GAS) may reside within ACPI tables which
      are byte aligned.  This patch copies GAS 'address' references to a local
      variable, which will be naturally aligned, to be used going forward.
      
      ACPI Generic Address Structure (GAS) reference:
        ACPI Specification, Revision 4.0, Section 5.2.3.1, "Generic Address
        Structure"
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      bc9ffce2
    • K
      ACPI: Store SRAT table revision · 8df0eb7c
      Kurt Garloff 提交于
      In SRAT v1, we had 8bit proximity domain (PXM) fields; SRAT v2 provides
      32bits for these. The new fields were reserved before.
      According to the ACPI spec, the OS must disregrard reserved fields.
      In order to know whether or not, we must know what version the SRAT
      table has.
      
      This patch stores the SRAT table revision for later consumption
      by arch specific __init functions.
      Signed-off-by: NKurt Garloff <kurt@garloff.de>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      8df0eb7c
    • H
      ACPI, APEI, Resolve false conflict between ACPI NVS and APEI · 4134b8c8
      Huang Ying 提交于
      Some firmware will access memory in ACPI NVS region via APEI.  That
      is, instructions in APEI ERST/EINJ table will read/write ACPI NVS
      region.  The original resource conflict checking in APEI code will
      check memory/ioport accessed by APEI via general resource management
      mech.  But ACPI NVS region is marked as busy already, so that the
      false resource conflict will prevent APEI ERST/EINJ to work.
      
      To fix this, this patch excludes ACPI NVS regions when APEI components
      request resources.  So that they will not conflict with ACPI NVS
      regions.
      Reported-and-tested-by: NPavel Ivanov <paivanof@gmail.com>
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      4134b8c8
    • H
      ACPI, Record ACPI NVS regions · b54ac6d2
      Huang Ying 提交于
      Some firmware will access memory in ACPI NVS region via APEI.  That
      is, instructions in APEI ERST/EINJ table will read/write ACPI NVS
      region.  The original resource conflict checking in APEI code will
      check memory/ioport accessed by APEI via general resource management
      mechanism.  But ACPI NVS region is marked as busy already, so that the
      false resource conflict will prevent APEI ERST/EINJ to work.
      
      To fix this, this patch record ACPI NVS regions, so that we can avoid
      request resources for memory region inside it.
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      b54ac6d2
    • X
      ACPI, APEI, EINJ, Refine the fix of resource conflict · b4e008dc
      Xiao, Hui 提交于
      Current fix for resource conflict is to remove the address region <param1 &
      param2, ~param2+1> from trigger resource, which is highly relies on valid user
      input. This patch is trying to avoid such potential issues by fetching the
      exact address region from trigger action table entry.
      Signed-off-by: NXiao, Hui <hui.xiao@linux.intel.com>
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      b4e008dc
    • H
      ACPI, APEI, EINJ, Fix resource conflict on some machine · fdea163d
      Huang Ying 提交于
      Some APEI firmware implementation will access injected address
      specified in param1 to trigger the error when injecting memory error.
      This will cause resource conflict with RAM.
      
      On one of our testing machine, if injecting at memory address
      0x10000000, the following error will be reported in dmesg:
      
        APEI: Can not request iomem region <0000000010000000-0000000010000008> for GARs.
      
      This patch removes the injecting memory address range from trigger
      table resources to avoid conflict.
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      fdea163d
    • H
      ACPI, Add RAM mapping support to ACPI atomic IO support · 76da3fb3
      Huang Ying 提交于
      On one of our testing machine, the following EINJ command lines:
      
        # echo 0x10000000 > param1
        # echo 0xfffffffffffff000 > param2
        # echo 0x8 > error_type
        # echo 1 > error_inject
      
      Will get:
      
        echo: write error: Input/output error
      
      The EIO comes from:
      
          rc = apei_exec_pre_map_gars(&trigger_ctx);
      
      The root cause is as follow.  Normally, ACPI atomic IO support is used
      to access IO memory.  But in EINJ of that machine, it is used to
      access RAM to trigger the injected error.  And the ioremap() called by
      apei_exec_pre_map_gars() can not map the RAM.
      
      This patch add RAM mapping support to ACPI atomic IO support to
      satisfy EINJ requirement.
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      76da3fb3