1. 07 5月, 2010 1 次提交
    • K
      x86: Detect running on a Microsoft HyperV system · a2a47c6c
      Ky Srinivasan 提交于
      This patch integrates HyperV detection within the framework currently
      used by VmWare. With this patch, we can avoid having to replicate the
      HyperV detection code in each of the Microsoft HyperV drivers.
      
      Reworked and tweaked by Greg K-H to build properly.
      Signed-off-by: NK. Y. Srinivasan <ksrinivasan@novell.com>
      LKML-Reference: <20100506190841.GA1605@kroah.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Vadim Rozenfeld <vrozenfe@redhat.com>
      Cc: Avi Kivity <avi@redhat.com>
      Cc: Gleb Natapov <gleb@redhat.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Alexey Dobriyan <adobriyan@gmail.com>
      Cc: "K.Prasad" <prasad@linux.vnet.ibm.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Alan Cox <alan@linux.intel.com>
      Cc: Haiyang Zhang <haiyangz@microsoft.com>
      Cc: Hank Janssen <hjanssen@microsoft.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      a2a47c6c
  2. 04 5月, 2010 2 次提交
  3. 23 4月, 2010 5 次提交
    • B
      x86, cacheinfo: Disable index in all four subcaches · 59d3b388
      Borislav Petkov 提交于
      When disabling an L3 cache index, make sure we disable that index in
      all four subcaches of the L3. Clarify nomenclature while at it, wrt to
      disable slots versus disable index and rename accordingly.
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      LKML-Reference: <1271945222-5283-6-git-send-email-bp@amd64.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      59d3b388
    • B
      x86, cacheinfo: Make L3 cache info per node · ba06edb6
      Borislav Petkov 提交于
      Currently, we're allocating L3 cache info and calculating indices for
      each online cpu which is clearly superfluous. Instead, we need to do
      this per-node as is each L3 cache.
      
      No functional change, only per-cpu memory savings.
      
      -v2: Allocate L3 cache descriptors array dynamically.
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      LKML-Reference: <1271945222-5283-5-git-send-email-bp@amd64.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      ba06edb6
    • B
      x86, cacheinfo: Reorganize AMD L3 cache structure · 9350f982
      Borislav Petkov 提交于
      Add a struct representing L3 cache attributes (subcache sizes and
      indices count) and move the respective members out of _cpuid4_info.
      Also, stash the struct pci_dev ptr into the struct simplifying the code
      even more.
      
      There should be no functionality change resulting from this patch except
      slightly slimming the _cpuid4_info per-cpu vars.
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      LKML-Reference: <1271945222-5283-4-git-send-email-bp@amd64.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      9350f982
    • F
      x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments · f2b20e41
      Frank Arnold 提交于
      When running a quest kernel on xen we get:
      
      BUG: unable to handle kernel NULL pointer dereference at 0000000000000038
      IP: [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x2ca/0x3df
      PGD 0
      Oops: 0000 [#1] SMP
      last sysfs file:
      CPU 0
      Modules linked in:
      
      Pid: 0, comm: swapper Tainted: G        W  2.6.34-rc3 #1 /HVM domU
      RIP: 0010:[<ffffffff8142f2fb>]  [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x
      2ca/0x3df
      RSP: 0018:ffff880002203e08  EFLAGS: 00010046
      RAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000060
      RDX: 0000000000000000 RSI: 0000000000000040 RDI: 0000000000000000
      RBP: ffff880002203ed8 R08: 00000000000017c0 R09: ffff880002203e38
      R10: ffff8800023d5d40 R11: ffffffff81a01e28 R12: ffff880187e6f5c0
      R13: ffff880002203e34 R14: ffff880002203e58 R15: ffff880002203e68
      FS:  0000000000000000(0000) GS:ffff880002200000(0000) knlGS:0000000000000000
      CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
      CR2: 0000000000000038 CR3: 0000000001a3c000 CR4: 00000000000006f0
      DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
      Process swapper (pid: 0, threadinfo ffffffff81a00000, task ffffffff81a44020)
      Stack:
       ffffffff810d7ecb ffff880002203e20 ffffffff81059140 ffff880002203e30
      <0> ffffffff810d7ec9 0000000002203e40 000000000050d140 ffff880002203e70
      <0> 0000000002008140 0000000000000086 ffff880040020140 ffffffff81068b8b
      Call Trace:
       <IRQ>
       [<ffffffff810d7ecb>] ? sync_supers_timer_fn+0x0/0x1c
       [<ffffffff81059140>] ? mod_timer+0x23/0x25
       [<ffffffff810d7ec9>] ? arm_supers_timer+0x34/0x36
       [<ffffffff81068b8b>] ? hrtimer_get_next_event+0xa7/0xc3
       [<ffffffff81058e85>] ? get_next_timer_interrupt+0x19a/0x20d
       [<ffffffff8142fa23>] get_cpu_leaves+0x5c/0x232
       [<ffffffff8106a7b1>] ? sched_clock_local+0x1c/0x82
       [<ffffffff8106a9a0>] ? sched_clock_tick+0x75/0x7a
       [<ffffffff8107748c>] generic_smp_call_function_single_interrupt+0xae/0xd0
       [<ffffffff8101f6ef>] smp_call_function_single_interrupt+0x18/0x27
       [<ffffffff8100a773>] call_function_single_interrupt+0x13/0x20
       <EOI>
       [<ffffffff8143c468>] ? notifier_call_chain+0x14/0x63
       [<ffffffff810295c6>] ? native_safe_halt+0xc/0xd
       [<ffffffff810114eb>] ? default_idle+0x36/0x53
       [<ffffffff81008c22>] cpu_idle+0xaa/0xe4
       [<ffffffff81423a9a>] rest_init+0x7e/0x80
       [<ffffffff81b10dd2>] start_kernel+0x40e/0x419
       [<ffffffff81b102c8>] x86_64_start_reservations+0xb3/0xb7
       [<ffffffff81b103c4>] x86_64_start_kernel+0xf8/0x107
      Code: 14 d5 40 ff ae 81 8b 14 02 31 c0 3b 15 47 1c 8b 00 7d 0e 48 8b 05 36 1c 8b
       00 48 63 d2 48 8b 04 d0 c7 85 5c ff ff ff 00 00 00 00 <8b> 70 38 48 8d 8d 5c ff
       ff ff 48 8b 78 10 ba c4 01 00 00 e8 eb
      RIP  [<ffffffff8142f2fb>] cpuid4_cache_lookup_regs+0x2ca/0x3df
       RSP <ffff880002203e08>
      CR2: 0000000000000038
      ---[ end trace a7919e7f17c0a726 ]---
      
      The L3 cache index disable feature of AMD CPUs has to be disabled if the
      kernel is running as guest on top of a hypervisor because northbridge
      devices are not available to the guest. Currently, this fixes a boot
      crash on top of Xen. In the future this will become an issue on KVM as
      well.
      
      Check if northbridge devices are present and do not enable the feature
      if there are none.
      Signed-off-by: NFrank Arnold <frank.arnold@amd.com>
      LKML-Reference: <1271945222-5283-3-git-send-email-bp@amd64.org>
      Acked-by: NBorislav Petkov <borislav.petkov@amd.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      f2b20e41
    • B
      x86, cacheinfo: Unify AMD L3 cache index disable checking · b1ab1b4d
      Borislav Petkov 提交于
      All F10h CPUs starting with model 8 resp. 9, stepping 1, support L3
      cache index disable. Concentrate the family, model, stepping checking at
      one place and enable the feature implicitly on upcoming Fam10h models.
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      LKML-Reference: <1271945222-5283-2-git-send-email-bp@amd64.org>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      b1ab1b4d
  4. 10 4月, 2010 5 次提交
  5. 30 3月, 2010 4 次提交
    • D
      sparc64: Properly truncate pt_regs framepointer in perf callback. · 9e8307ec
      David S. Miller 提交于
      For 32-bit processes, we save the full 64-bits of the regs in pt_regs.
      
      But unlike when the userspace actually does load and store
      instructions, the top 32-bits don't get automatically truncated by the
      cpu in kernel mode (because the kernel doesn't execute with PSTATE_AM
      address masking enabled).
      
      So we have to do it by hand.
      Reported-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9e8307ec
    • Y
      x86: Make sure free_init_pages() frees pages on page boundary · c967da6a
      Yinghai Lu 提交于
      When CONFIG_NO_BOOTMEM=y, it could use memory more effiently, or
      in a more compact fashion.
      
      Example:
      
       Allocated new RAMDISK: 00ec2000 - 0248ce57
       Move RAMDISK from 000000002ea04000 - 000000002ffcee56 to 00ec2000 - 0248ce56
      
      The new RAMDISK's end is not page aligned.
      Last page could be shared with other users.
      
      When free_init_pages are called for initrd or .init, the page
      could be freed and we could corrupt other data.
      
      code segment in free_init_pages():
      
       |        for (; addr < end; addr += PAGE_SIZE) {
       |                ClearPageReserved(virt_to_page(addr));
       |                init_page_count(virt_to_page(addr));
       |                memset((void *)(addr & ~(PAGE_SIZE-1)),
       |                        POISON_FREE_INITMEM, PAGE_SIZE);
       |                free_page(addr);
       |                totalram_pages++;
       |        }
      
      last half page could be used as one whole free page.
      
      So page align the boundaries.
      
      -v2: make the original initramdisk to be aligned, according to
           Johannes, otherwise we have the chance to lose one page.
           we still need to keep initrd_end not aligned, otherwise it could
           confuse decompressor.
      -v3: change to WARN_ON instead, suggested by Johannes.
      -v4: use PAGE_ALIGN, suggested by Johannes.
           We may fix that macro name later to PAGE_ALIGN_UP, and PAGE_ALIGN_DOWN
           Add comments about assuming ramdisk start is aligned
           in relocate_initrd(), change to re get ramdisk_image instead of save it
           to make diff smaller. Add warning for wrong range, suggested by Johannes.
      -v6: remove one WARN()
           We need to align beginning in free_init_pages()
           do not copy more than ramdisk_size, noticed by Johannes
      Reported-by: NStanislaw Gruszka <sgruszka@redhat.com>
      Tested-by: NStanislaw Gruszka <sgruszka@redhat.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NJohannes Weiner <hannes@cmpxchg.org>
      Cc: David Miller <davem@davemloft.net>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      LKML-Reference: <1269830604-26214-3-git-send-email-yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c967da6a
    • Y
      x86: Make smp_locks end with page alignment · 596b711e
      Yinghai Lu 提交于
      Fix:
      
       ------------[ cut here ]------------
       WARNING: at arch/x86/mm/init.c:342 free_init_pages+0x4c/0xfa()
       free_init_pages: range [0x40daf000, 0x40db5c24] is not aligned
       Modules linked in:
       Pid: 0, comm: swapper Not tainted
       2.6.34-rc2-tip-03946-g4f16b23-dirty #50 Call Trace:
        [<40232e9f>] warn_slowpath_common+0x65/0x7c
        [<4021c9f0>] ? free_init_pages+0x4c/0xfa
        [<40881434>] ? _etext+0x0/0x24
        [<40232eea>] warn_slowpath_fmt+0x24/0x27
        [<4021c9f0>] free_init_pages+0x4c/0xfa
        [<40881434>] ? _etext+0x0/0x24
        [<40d3f4bd>] alternative_instructions+0xf6/0x100
        [<40d3fe4f>] check_bugs+0xbd/0xbf
        [<40d398a7>] start_kernel+0x2d5/0x2e4
        [<40d390ce>] i386_start_kernel+0xce/0xd5
       ---[ end trace 4eaa2a86a8e2da22 ]---
      
      Comments in vmlinux.lds.S already said:
      
       |        /*
       |         * smp_locks might be freed after init
       |         * start/end must be page aligned
       |         */
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NJohannes Weiner <hannes@cmpxchg.org>
      Cc: David Miller <davem@davemloft.net>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      LKML-Reference: <1269830604-26214-2-git-send-email-yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      596b711e
    • D
      frv/chris: fix lines with a missing semicolons · f7454c5d
      David Howells 提交于
      Commit b26b2d49 ("resource/PCI: align functions now return start
      of resource") added lines with missing semicolons.
      
      Add the missing semicolons to the FRV and CRIS arch code.
      Signed-off-by: NDavid Howells <dhowells@redhat.com>
      Cc: linux@dominikbrodowski.net
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f7454c5d
  6. 28 3月, 2010 1 次提交
  7. 27 3月, 2010 1 次提交
  8. 26 3月, 2010 2 次提交
  9. 25 3月, 2010 2 次提交
  10. 24 3月, 2010 6 次提交
  11. 23 3月, 2010 10 次提交
  12. 22 3月, 2010 1 次提交