1. 24 3月, 2018 1 次提交
  2. 21 3月, 2018 1 次提交
  3. 20 3月, 2018 2 次提交
    • C
      drm/i915: Add control flags to i915_handle_error() · ce800754
      Chris Wilson 提交于
      Not all callers want the GPU error to handled in the same way, so expose
      a control parameter. In the first instance, some callers do not want the
      heavyweight error capture so add a bit to request the state to be
      captured and saved.
      
      v2: Pass msg down to i915_reset/i915_reset_engine so that we include the
      reason for the reset in the dev_notice(), superseding the earlier option
      to not print that notice.
      v3: Stash the reason inside the i915->gpu_error to handover to the direct
      reset from the blocking waiter.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Jeff McGee <jeff.mcgee@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180320100449.1360-2-chris@chris-wilson.co.uk
      ce800754
    • O
      drm/i915/icl: Check for fused-off VDBOX and VEBOX instances · 26376a7e
      Oscar Mateo 提交于
      In Gen11, the Video Decode engines (aka VDBOX, aka VCS, aka BSD) and the
      Video Enhancement engines (aka VEBOX, aka VECS) could be fused off. Also,
      each VDBOX and VEBOX has its own power well, which only exist if the
      related engine exists in the HW.
      
      Unfortunately, we have a Catch-22 situation going on: we need the blitter
      forcewake to read the register with the fuse info, but we cannot initialize
      the forcewake domains without knowin about the engines present in the HW.
      We workaround this problem by allowing the initialization of all forcewake
      domains and then pruning the fused off ones, as per the fuse information.
      
      Bspec: 20680
      
      v2: We were shifting incorrectly for vebox disable (Vinay)
      
      v3: Assert mmio is ready and warn if we have attempted to initialize
          forcewake for fused-off engines (Paulo)
      
      v4:
        - Use INTEL_GEN in new code (Tvrtko)
        - Shorter local variable (Tvrtko, Michal)
        - Keep "if (!...) continue" style (Tvrtko)
        - No unnecessary BUG_ON (Tvrtko)
        - WARN_ON and cleanup if wrong mask (Tvrtko, Michal)
        - Use I915_READ_FW (Michal)
        - Use I915_MAX_VCS/VECS macros (Michal)
      
      v5: Rebased by Rodrigo fixing conflicts on top of:
          "drm/i915: Simplify intel_engines_init"
      
      v6: Fix v5. Remove info->num_rings. (by Oscar)
      
      v7: Rebase (Rodrigo).
      
      v8:
        - s/intel_device_info_fused_off_engines/
          intel_device_info_init_mmio (Chris)
        - Make vdbox_disable & vebox_disable local variables (Chris)
      
      v9:
        - Move function declaration to intel_device_info.h (Michal)
        - Missing indent in bit fields definitions (Michal)
        - When RC6 is enabled by BIOS, the fuse register cannot be read until
          the blitter powerwell is awake. Shuffle where the fuse is read, prune
          the forcewake domains after the fact and change the commit message
          accordingly (Vinay, Sagar, Chris).
      
      v10:
        - Improved commit message (Sagar)
        - New line in header file (Sagar)
        - Specify the message in fw_domain_reset applies to ICL+ (Sagar)
      
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: NOscar Mateo <oscar.mateo@intel.com>
      Reviewed-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180316121456.11577-1-mika.kuoppala@linux.intel.com
      [Mika: soothe checkpatch on commit msg]
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      26376a7e
  4. 19 3月, 2018 1 次提交
  5. 16 3月, 2018 1 次提交
    • C
      drm/i915: Stop engines when declaring the machine wedged · ac697ae8
      Chris Wilson 提交于
      If we fail to reset the GPU, we declare the machine wedged. However, the
      GPU may well still be running in the background with an in-flight
      request. So despite our efforts in cleaning up the request queue and
      faking the breadcrumb in the HWSP, the GPU may eventually write the
      in-flght seqno there breaking all of our assumptions and throwing the
      driver into a deep turmoil, wedging beyond wedged.
      
      To avoid this we ideally want to reset the GPU. Since that has already
      failed, make sure the rings have the stop bit set instead. This is part
      of the normal GPU reset sequence, but that is actually disabled by
      igt/gem_eio to force the wedged state. If we assume the worst, we must
      poke at the bit again before we give up.
      
      v2: Move the intel_gpu_reset() from set-wedged in the reset error path
      into i915_gem_set_wedged() itself. Even if the reset fails (e.g. if it is
      disabled by gem_eio), it still tries to make sure the engines are
      stopped. For i915_gem_set_wedged() callers from outside of i915_reset(),
      this should make sure the GPU is disabled while the driver is marked as
      being wedged.
      
      Testcase: igt/gem_eio
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180315151015.22741-1-chris@chris-wilson.co.uk
      ac697ae8
  6. 14 3月, 2018 1 次提交
    • J
      drm/i915: Implement dynamic GuC WOPCM offset and size calculation · 6b0478fb
      Jackie Li 提交于
      Hardware may have specific restrictions on GuC WOPCM offset and size. On
      Gen9, the value of the GuC WOPCM size register needs to be larger than the
      value of GuC WOPCM offset register + a Gen9 specific offset (144KB) for
      reserved GuC WOPCM. Fail to enforce such a restriction on GuC WOPCM size
      will lead to GuC firmware execution failures. On the other hand, with
      current static GuC WOPCM offset and size values (512KB for both offset and
      size), the GuC WOPCM size verification will fail on Gen9 even if it can be
      fixed by lowering the GuC WOPCM offset by calculating its value based on
      HuC firmware size (which is likely less than 200KB on Gen9), so that we can
      have a GuC WOPCM size value which is large enough to pass the GuC WOPCM
      size check.
      
      This patch updates the reserved GuC WOPCM size for RC6 context on Gen9 to
      24KB to strictly align with the Gen9 GuC WOPCM layout. It also adds support
      to verify the GuC WOPCM size aganist the Gen9 hardware restrictions. To
      meet all above requirements, let's provide dynamic partitioning of the
      WOPCM that will be based on platform specific HuC/GuC firmware sizes.
      
      v2:
       - Removed intel_wopcm_init (Ville/Sagar/Joonas)
       - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar)
       - Removed unnecessary function calls (Joonas)
       - Init GuC WOPCM partition as soon as firmware fetching is completed
      
      v3:
       - Fixed indentation issues (Chris)
       - Removed layering violation code (Chris/Michal)
       - Created separat files for GuC wopcm code  (Michal)
       - Used inline function to avoid code duplication (Michal)
      
      v4:
       - Preset the GuC WOPCM top during early GuC init (Chris)
       - Fail intel_uc_init_hw() as soon as GuC WOPCM partitioning failed
      
      v5:
       - Moved GuC DMA WOPCM register updating code into intel_wopcm.c
       - Took care of the locking status before writing to GuC DMA
         Write-Once registers. (Joonas)
      
      v6:
       - Made sure the GuC WOPCM size to be multiple of 4K (4K aligned)
      
      v8:
       - Updated comments and fixed naming issues (Sagar/Joonas)
       - Updated commit message to include more description about the hardware
         restriction on GuC WOPCM size (Sagar)
      
      v9:
       - Minor changes variable names and code comments (Sagar)
       - Added detailed GuC WOPCM layout drawing (Sagar/Michal)
       - Refined macro definitions to be reader friendly (Michal)
       - Removed redundent check to valid flag (Michal)
       - Unified first parameter for exported GuC WOPCM functions (Michal)
       - Refined the name and parameter list of hardware restriction checking
         functions (Michal)
      
      v10:
       - Used shorter function name for internal functions (Joonas)
       - Moved init-ealry function into c file (Joonas)
       - Consolidated and removed redundant size checks (Joonas/Michal)
       - Removed unnecessary unlikely() from code which is only called once
         during boot (Joonas)
       - More fixes to kernel-doc format and content (Michal)
       - Avoided the use of PAGE_MASK for 4K pages (Michal)
       - Added error log messages to error paths (Michal)
      
      v11:
       - Replaced intel_guc_wopcm with more generic intel_wopcm and attached
         intel_wopcm to drm_i915_private instead intel_guc (Michal)
       - dynamic calculation of GuC non-wopcm memory start (a.k.a WOPCM Top
         offset from GuC WOPCM base) (Michal)
       - Moved WOPCM marco definitions into .c source file (Michal)
       - Exported WOPCM layout diagram as kernel-doc (Michal)
      
      v12:
       - Updated naming, function kernel-doc to align with new changes (Michal)
      
      v13:
       - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
       - Corrected one tense error in comment (Sagar)
       - Corrected typos and removed spurious comments (Joonas)
      
      Bspec: 12690
      Signed-off-by: NJackie Li <yaodong.li@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
      Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Cc: John Spotswood <john.a.spotswood@intel.com>
      Cc: Oscar Mateo <oscar.mateo@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9)
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-2-git-send-email-yaodong.li@intel.com
      6b0478fb
  7. 13 3月, 2018 1 次提交
  8. 10 3月, 2018 1 次提交
  9. 08 3月, 2018 2 次提交
    • L
      drm/i915: add query uAPI · a446ae2c
      Lionel Landwerlin 提交于
      There are a number of information that are readable from hardware
      registers and that we would like to make accessible to userspace. One
      particular example is the topology of the execution units (how are
      execution units grouped in subslices and slices and also which ones
      have been fused off for die recovery).
      
      At the moment the GET_PARAM ioctl covers some basic needs, but
      generally is only able to return a single value for each defined
      parameter. This is a bit problematic with topology descriptions which
      are array/maps of available units.
      
      This change introduces a new ioctl that can deal with requests to fill
      structures of potentially variable lengths. The user is expected fill
      a query with length fields set at 0 on the first call, the kernel then
      sets the length fields to the their expected values. A second call to
      the kernel with length fields at their expected values will trigger a
      copy of the data to the pointed memory locations.
      
      The scope of this uAPI is only to provide information to userspace,
      not to allow configuration of the device.
      
      v2: Simplify dispatcher code iteration (Tvrtko)
          Tweak uapi drm_i915_query_item structure (Tvrtko)
      
      v3: Rename pad fields into flags (Chris)
          Return error on flags field != 0 (Chris)
          Only copy length back to userspace in drm_i915_query_item (Chris)
      
      v4: Use array of functions instead of switch (Chris)
      
      v5: More comments in uapi (Tvrtko)
          Return query item errors in length field (All)
      
      v6: Tweak uapi comments style to match the coding style (Lionel)
      
      v7: Add i915_query.h (Joonas)
      
      v8: (Lionel) Change the behavior of the item iterator to report
          invalid queries into the query item rather than stopping the
          iteration. This enables userspace applications to query newer
          items on older kernels and only have failure on the items that are
          not supported.
      
      v9: Edit copyright headers (Joonas)
      
      v10: Typos & comments in uapi (Joonas)
      Signed-off-by: NLionel Landwerlin <lionel.g.landwerlin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-6-lionel.g.landwerlin@intel.com
      a446ae2c
    • L
      drm/i915: store all subslice masks · 8cc76693
      Lionel Landwerlin 提交于
      Up to now, subslice mask was assumed to be uniform across slices. But
      starting with Cannonlake, slices can be asymmetric (for example slice0
      has different number of subslices as slice1+). This change stores all
      subslices masks for all slices rather than having a single mask that
      applies to all slices.
      
      v2: Rework how we store total numbers in sseu_dev_info (Tvrtko)
          Fix CHV eu masks, was reading disabled as enabled (Tvrtko)
          Readability changes (Tvrtko)
          Add EU index helper (Tvrtko)
      
      v3: Turn ALIGN(v, 8) / 8 into DIV_ROUND_UP(v, BITS_PER_BYTE) (Tvrtko)
          Reuse sseu_eu_idx() for setting eu_mask on CHV (Tvrtko)
          Reformat debug prints for subslices (Tvrtko)
      
      v4: Change eu_mask helper into sseu_set_eus() (Tvrtko)
      
      v5: With Haswell reporting masks & counts, bump sseu_*_eus() functions
          to use u16 (Lionel)
      
      v6: Fix sseu_get_eus() for > 8 EUs per subslice (Lionel)
      
      v7: Change debugfs enabels for number of subslices per slice, will
          need a small igt/pm_sseu change (Lionel)
          Drop subslice_total field from sseu_dev_info, rely on
          sseu_subslice_total() to recompute the value instead (Lionel)
      
      v8: Remove unused function compute_subslice_total() (Lionel)
      Signed-off-by: NLionel Landwerlin <lionel.g.landwerlin@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-2-lionel.g.landwerlin@intel.com
      8cc76693
  10. 03 3月, 2018 1 次提交
  11. 22 2月, 2018 1 次提交
  12. 16 2月, 2018 2 次提交
  13. 14 2月, 2018 1 次提交
  14. 13 2月, 2018 3 次提交
  15. 12 2月, 2018 1 次提交
  16. 10 2月, 2018 1 次提交
  17. 08 2月, 2018 2 次提交
  18. 07 2月, 2018 1 次提交
  19. 02 2月, 2018 2 次提交
  20. 01 2月, 2018 1 次提交
  21. 25 1月, 2018 2 次提交
    • S
      drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutex · 70deeadd
      Sagar Arun Kamble 提交于
      This patch fixes lockdep issue due to circular locking dependency of
      struct_mutex, i_mutex_key, mmap_sem, relay_channels_mutex.
      For GuC log relay channel we create debugfs file that requires i_mutex_key
      lock and we are doing that under struct_mutex. So we introduced newer
      dependency as:
          &dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
      However, there is dependency from mmap_sem to struct_mutex. Hence we
      separate the relay create/destroy operation from under struct_mutex.
      Also added runtime check of relay buffer status.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      
      ======================================================
      WARNING: possible circular locking dependency detected
      4.15.0-rc6-CI-Patchwork_7614+ #1 Not tainted
      ------------------------------------------------------
      debugfs_test/1388 is trying to acquire lock:
       (&dev->struct_mutex){+.+.}, at: [<00000000d5e1d915>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
      
      but task is already holding lock:
       (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
      
      which lock already depends on the new lock.
      
      the existing dependency chain (in reverse order) is:
      
      -> #3 (&mm->mmap_sem){++++}:
             _copy_to_user+0x1e/0x70
             filldir+0x8c/0xf0
             dcache_readdir+0xeb/0x160
             iterate_dir+0xdc/0x140
             SyS_getdents+0xa0/0x130
             entry_SYSCALL_64_fastpath+0x1c/0x89
      
      -> #2 (&sb->s_type->i_mutex_key#3){++++}:
             start_creating+0x59/0x110
             __debugfs_create_file+0x2e/0xe0
             relay_create_buf_file+0x62/0x80
             relay_late_setup_files+0x84/0x250
             guc_log_late_setup+0x4f/0x110 [i915]
             i915_guc_log_register+0x32/0x40 [i915]
             i915_driver_load+0x7b6/0x1720 [i915]
             i915_pci_probe+0x2e/0x90 [i915]
             pci_device_probe+0x9c/0x120
             driver_probe_device+0x2a3/0x480
             __driver_attach+0xd9/0xe0
             bus_for_each_dev+0x57/0x90
             bus_add_driver+0x168/0x260
             driver_register+0x52/0xc0
             do_one_initcall+0x39/0x150
             do_init_module+0x56/0x1ef
             load_module+0x231c/0x2d70
             SyS_finit_module+0xa5/0xe0
             entry_SYSCALL_64_fastpath+0x1c/0x89
      
      -> #1 (relay_channels_mutex){+.+.}:
             relay_open+0x12c/0x2b0
             intel_guc_log_runtime_create+0xab/0x230 [i915]
             intel_guc_init+0x81/0x120 [i915]
             intel_uc_init+0x29/0xa0 [i915]
             i915_gem_init+0x182/0x530 [i915]
             i915_driver_load+0xaa9/0x1720 [i915]
             i915_pci_probe+0x2e/0x90 [i915]
             pci_device_probe+0x9c/0x120
             driver_probe_device+0x2a3/0x480
             __driver_attach+0xd9/0xe0
             bus_for_each_dev+0x57/0x90
             bus_add_driver+0x168/0x260
             driver_register+0x52/0xc0
             do_one_initcall+0x39/0x150
             do_init_module+0x56/0x1ef
             load_module+0x231c/0x2d70
             SyS_finit_module+0xa5/0xe0
             entry_SYSCALL_64_fastpath+0x1c/0x89
      
      -> #0 (&dev->struct_mutex){+.+.}:
             __mutex_lock+0x81/0x9b0
             i915_mutex_lock_interruptible+0x47/0x130 [i915]
             i915_gem_fault+0x201/0x790 [i915]
             __do_fault+0x15/0x70
             __handle_mm_fault+0x677/0xdc0
             handle_mm_fault+0x14f/0x2f0
             __do_page_fault+0x2d1/0x560
             page_fault+0x4c/0x60
      
      other info that might help us debug this:
      
      Chain exists of:
        &dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
      
       Possible unsafe locking scenario:
      
             CPU0                    CPU1
             ----                    ----
        lock(&mm->mmap_sem);
                                     lock(&sb->s_type->i_mutex_key#3);
                                     lock(&mm->mmap_sem);
        lock(&dev->struct_mutex);
      
       *** DEADLOCK ***
      
      1 lock held by debugfs_test/1388:
       #0:  (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
      
      stack backtrace:
      CPU: 2 PID: 1388 Comm: debugfs_test Not tainted 4.15.0-rc6-CI-Patchwork_7614+ #1
      Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./J4205-ITX, BIOS P1.10 09/29/2016
      Call Trace:
       dump_stack+0x5f/0x86
       print_circular_bug.isra.18+0x1d0/0x2c0
       __lock_acquire+0x14ae/0x1b60
       ? lock_acquire+0xaf/0x200
       lock_acquire+0xaf/0x200
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       __mutex_lock+0x81/0x9b0
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? __pm_runtime_resume+0x4f/0x80
       i915_gem_fault+0x201/0x790 [i915]
       __do_fault+0x15/0x70
       ? _raw_spin_unlock+0x29/0x40
       __handle_mm_fault+0x677/0xdc0
       handle_mm_fault+0x14f/0x2f0
       __do_page_fault+0x2d1/0x560
       ? page_fault+0x36/0x60
       page_fault+0x4c/0x60
      
      v2: Added lock protection to guc->log.runtime.relay_chan (Chris)
          Fixed locking inside guc_flush_logs uncovered by new lockdep.
      
      v3: Locking guc_read_update_log_buffer entirely with relay_lock. (Chris)
          Prepared intel_guc_init_early. Moved relay_lock inside relay_create
          relay_destroy, relay_file_create, guc_read_update_log_buffer. (Michal)
          Removed struct_mutex lock around guc_log_flush and removed usage
          of guc_log_has_relay() from runtime_create path as it needs
          struct_mutex lock.
      
      v4: Handle NULL relay sub buffer pointer earlier in read_update_log_buffer
          (Chris). Fixed comment suffix **/. (Michal)
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693
      Testcase: igt/debugfs_test/read_all_entries # with enable_guc=1 and guc_log_level=1
      Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Marta Lofstedt <marta.lofstedt@intel.com>
      Cc: Michal Winiarski <michal.winiarski@intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/1516808821-3638-3-git-send-email-sagar.a.kamble@intel.com
      70deeadd
    • S
      drm/i915/guc: Enable interrupts before resuming GuC during runtime resume · 1ed21cb4
      Sagar Arun Kamble 提交于
      GuC log streaming needs interrupts enabled prior to GuC resume but
      runtime pm interrupt setup was happening post GuC resume. Fix it.
      While at it, fix the unwinding of steps in the runtime suspend path.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104695Signed-off-by: NSagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Marta Lofstedt <marta.lofstedt@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/1516808821-3638-2-git-send-email-sagar.a.kamble@intel.com
      1ed21cb4
  22. 20 1月, 2018 1 次提交
  23. 17 1月, 2018 1 次提交
  24. 22 12月, 2017 3 次提交
  25. 19 12月, 2017 1 次提交
  26. 18 12月, 2017 1 次提交
  27. 16 12月, 2017 1 次提交
  28. 14 12月, 2017 2 次提交
    • M
      drm/i915/guc: Extract guc_init from guc_init_hw · 61b5c158
      Michał Winiarski 提交于
      After GPU reset, GuC HW needs to be reinitialized (with FW reload).
      Unfortunately, we're doing some extra work there (mostly allocating stuff),
      work that can be moved to guc_init and called once at driver load time.
      
      As a side effect we're no longer hitting an assert in
      i915_ggtt_enable_guc on suspend/resume.
      
      v2: Do not duplicate disable_communication / reset_guc_interrupts
      v3: Add proper teardown after rebase
      
      References: 04f7b24e ("drm/i915/guc: Assert that we switch between known ggtt->invalidate functions")
      Signed-off-by: NMichał Winiarski <michal.winiarski@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20171213221352.7173-3-michal.winiarski@intel.com
      61b5c158
    • M
      drm/i915/guc: Move GuC workqueue allocations outside of the mutex · 3176ff49
      Michał Winiarski 提交于
      This gets rid of the following lockdep splat:
      
      ======================================================
      WARNING: possible circular locking dependency detected
      4.15.0-rc2-CI-Patchwork_7428+ #1 Not tainted
      ------------------------------------------------------
      debugfs_test/1351 is trying to acquire lock:
       (&dev->struct_mutex){+.+.}, at: [<000000009d90d1a3>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
      
      but task is already holding lock:
       (&mm->mmap_sem){++++}, at: [<000000005df01c1e>] __do_page_fault+0x106/0x560
      
      which lock already depends on the new lock.
      
      the existing dependency chain (in reverse order) is:
      
      -> #6 (&mm->mmap_sem){++++}:
             __might_fault+0x63/0x90
             _copy_to_user+0x1e/0x70
             filldir+0x8c/0xf0
             dcache_readdir+0xeb/0x160
             iterate_dir+0xe6/0x150
             SyS_getdents+0xa0/0x130
             entry_SYSCALL_64_fastpath+0x1c/0x89
      
      -> #5 (&sb->s_type->i_mutex_key#5){++++}:
             lockref_get+0x9/0x20
      
      -> #4 ((completion)&req.done){+.+.}:
             wait_for_common+0x54/0x210
             devtmpfs_create_node+0x130/0x150
             device_add+0x5ad/0x5e0
             device_create_groups_vargs+0xd4/0xe0
             device_create+0x35/0x40
             msr_device_create+0x22/0x40
             cpuhp_invoke_callback+0xc5/0xbf0
             cpuhp_thread_fun+0x167/0x210
             smpboot_thread_fn+0x17f/0x270
             kthread+0x173/0x1b0
             ret_from_fork+0x24/0x30
      
      -> #3 (cpuhp_state-up){+.+.}:
             cpuhp_issue_call+0x132/0x1c0
             __cpuhp_setup_state_cpuslocked+0x12f/0x2a0
             __cpuhp_setup_state+0x3a/0x50
             page_writeback_init+0x3a/0x5c
             start_kernel+0x393/0x3e2
             secondary_startup_64+0xa5/0xb0
      
      -> #2 (cpuhp_state_mutex){+.+.}:
             __mutex_lock+0x81/0x9b0
             __cpuhp_setup_state_cpuslocked+0x4b/0x2a0
             __cpuhp_setup_state+0x3a/0x50
             page_alloc_init+0x1f/0x26
             start_kernel+0x139/0x3e2
             secondary_startup_64+0xa5/0xb0
      
      -> #1 (cpu_hotplug_lock.rw_sem){++++}:
             cpus_read_lock+0x34/0xa0
             apply_workqueue_attrs+0xd/0x40
             __alloc_workqueue_key+0x2c7/0x4e1
             intel_guc_submission_init+0x10c/0x650 [i915]
             intel_uc_init_hw+0x29e/0x460 [i915]
             i915_gem_init_hw+0xca/0x290 [i915]
             i915_gem_init+0x115/0x3a0 [i915]
             i915_driver_load+0x9a8/0x16c0 [i915]
             i915_pci_probe+0x2e/0x90 [i915]
             pci_device_probe+0x9c/0x120
             driver_probe_device+0x2a3/0x480
             __driver_attach+0xd9/0xe0
             bus_for_each_dev+0x57/0x90
             bus_add_driver+0x168/0x260
             driver_register+0x52/0xc0
             do_one_initcall+0x39/0x150
             do_init_module+0x56/0x1ef
             load_module+0x231c/0x2d70
             SyS_finit_module+0xa5/0xe0
             entry_SYSCALL_64_fastpath+0x1c/0x89
      
      -> #0 (&dev->struct_mutex){+.+.}:
             lock_acquire+0xaf/0x200
             __mutex_lock+0x81/0x9b0
             i915_mutex_lock_interruptible+0x47/0x130 [i915]
             i915_gem_fault+0x201/0x760 [i915]
             __do_fault+0x15/0x70
             __handle_mm_fault+0x85b/0xe40
             handle_mm_fault+0x14f/0x2f0
             __do_page_fault+0x2d1/0x560
             page_fault+0x22/0x30
      
      other info that might help us debug this:
      
      Chain exists of:
        &dev->struct_mutex --> &sb->s_type->i_mutex_key#5 --> &mm->mmap_sem
      
       Possible unsafe locking scenario:
      
             CPU0                    CPU1
             ----                    ----
        lock(&mm->mmap_sem);
                                     lock(&sb->s_type->i_mutex_key#5);
                                     lock(&mm->mmap_sem);
        lock(&dev->struct_mutex);
      
       *** DEADLOCK ***
      
      1 lock held by debugfs_test/1351:
       #0:  (&mm->mmap_sem){++++}, at: [<000000005df01c1e>] __do_page_fault+0x106/0x560
      
      stack backtrace:
      CPU: 2 PID: 1351 Comm: debugfs_test Not tainted 4.15.0-rc2-CI-Patchwork_7428+ #1
      Hardware name:                  /NUC6i5SYB, BIOS SYSKLi35.86A.0057.2017.0119.1758 01/19/2017
      Call Trace:
       dump_stack+0x5f/0x86
       print_circular_bug+0x230/0x3b0
       check_prev_add+0x439/0x7b0
       ? lockdep_init_map_crosslock+0x20/0x20
       ? unwind_get_return_address+0x16/0x30
       ? __lock_acquire+0x1385/0x15a0
       __lock_acquire+0x1385/0x15a0
       lock_acquire+0xaf/0x200
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       __mutex_lock+0x81/0x9b0
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? i915_mutex_lock_interruptible+0x47/0x130 [i915]
       i915_mutex_lock_interruptible+0x47/0x130 [i915]
       ? __pm_runtime_resume+0x4f/0x80
       i915_gem_fault+0x201/0x760 [i915]
       __do_fault+0x15/0x70
       __handle_mm_fault+0x85b/0xe40
       handle_mm_fault+0x14f/0x2f0
       __do_page_fault+0x2d1/0x560
       page_fault+0x22/0x30
      RIP: 0033:0x7f98d6f49116
      RSP: 002b:00007ffd6ffc3278 EFLAGS: 00010283
      RAX: 00007f98d39a2bc0 RBX: 0000000000000000 RCX: 0000000000001680
      RDX: 0000000000001680 RSI: 00007ffd6ffc3400 RDI: 00007f98d39a2bc0
      RBP: 00007ffd6ffc33a0 R08: 0000000000000000 R09: 00000000000005a0
      R10: 000055e847c2a830 R11: 0000000000000002 R12: 0000000000000001
      R13: 000055e847c1d040 R14: 00007ffd6ffc3400 R15: 00007f98d6752ba0
      
      v2: Init preempt_work unconditionally (Chris)
      v3: Mention that we need the enable_guc=1 for lockdep splat (Chris)
      
      Testcase: igt/debugfs_test/read_all_entries # with i915.enable_guc=1
      Signed-off-by: NMichał Winiarski <michal.winiarski@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20171213221352.7173-2-michal.winiarski@intel.com
      3176ff49
  29. 13 12月, 2017 1 次提交