1. 25 5月, 2015 3 次提交
  2. 13 5月, 2015 1 次提交
  3. 09 5月, 2015 1 次提交
  4. 08 5月, 2015 1 次提交
  5. 24 4月, 2015 1 次提交
  6. 22 12月, 2014 1 次提交
  7. 20 10月, 2014 1 次提交
  8. 12 8月, 2014 1 次提交
  9. 04 7月, 2014 1 次提交
    • M
      spi: omap2-mcspi: Configure hardware when slave driver changes mode · 97ca0d6c
      Mark A. Greer 提交于
      Commit id 2bd16e3e
      (spi: omap2-mcspi: Do not configure the controller
      on each transfer unless needed) does its job too
      well so omap2_mcspi_setup_transfer() isn't called
      even when an SPI slave driver changes 'spi->mode'.
      The result is that the mode requested by the SPI
      slave driver never takes effect.
      
      Fix this by adding the 'mode' member to the
      omap2_mcspi_cs structure which holds the mode
      value that the hardware is configured for.
      When the SPI slave driver changes 'spi->mode'
      it will be different than the value of this new
      member and the SPI master driver will know that
      the hardware must be reconfigured (by calling
      omap2_mcspi_setup_transfer()).
      
      Fixes: 2bd16e3e (spi: omap2-mcspi: Do not configure the controller on each transfer unless needed)
      Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      Cc: stable@vger.kernel.org
      97ca0d6c
  10. 03 4月, 2014 1 次提交
  11. 19 2月, 2014 2 次提交
  12. 04 2月, 2014 2 次提交
  13. 03 2月, 2014 1 次提交
  14. 24 11月, 2013 1 次提交
  15. 17 10月, 2013 1 次提交
  16. 10 10月, 2013 1 次提交
  17. 26 9月, 2013 1 次提交
  18. 29 8月, 2013 1 次提交
  19. 30 7月, 2013 1 次提交
  20. 24 6月, 2013 1 次提交
  21. 18 6月, 2013 1 次提交
    • I
      spi: omap2-mcspi: Add FIFO buffer support · d33f473d
      Illia Smyrnov 提交于
      The MCSPI controller has a built-in FIFO buffer to unload the DMA or interrupt
      handler and improve data throughput. This patch adds FIFO buffer support for SPI
      transfers in DMA mode.
      
      For SPI transfers in DMA mode, the largest possible FIFO buffer size will be
      calculated and set up. The FIFO won't be used for the SPI transfers in DMA mode
      if: calculated FIFO buffer size is less then 2 bytes or the FIFO buffer size
      isn't multiple of the SPI word length.
      Signed-off-by: NIllia Smyrnov <illia.smyrnov@ti.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      d33f473d
  22. 17 6月, 2013 1 次提交
  23. 30 5月, 2013 1 次提交
  24. 23 5月, 2013 1 次提交
  25. 13 5月, 2013 1 次提交
  26. 18 4月, 2013 1 次提交
  27. 16 4月, 2013 1 次提交
  28. 01 4月, 2013 1 次提交
  29. 05 2月, 2013 1 次提交
  30. 26 1月, 2013 3 次提交
  31. 08 12月, 2012 1 次提交
  32. 02 12月, 2012 2 次提交
  33. 14 11月, 2012 1 次提交