- 08 2月, 2018 4 次提交
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由 Nicolas Chauvet 提交于
Without this, the imx6q-cpufreq driver isn't loaded automatically when built as a module Tested on wandboard quad with a fedora 27 kernel rpm Signed-off-by: NNicolas Chauvet <kwizart@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Dominik Brodowski 提交于
Pointer subtraction is slow and tedious. Therefore, replace all instances where cpufreq_for_each_{valid_,}entry loops contained such substractions with an iteration macro providing an index to the frequency_table entry. Suggested-by: NAl Viro <viro@ZenIV.linux.org.uk> Link: http://lkml.kernel.org/r/20180120020237.GM13338@ZenIV.linux.org.ukAcked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Chen Yu 提交于
When maxcpus=1 is in the kernel command line, the BP is responsible for re-enabling the HWP - because currently only the APs invoke intel_pstate_hwp_enable() during their online process - which might put the system into unstable state after resume. Fix this by enabling the HWP explicitly on BP during resume. Reported-by: NDoug Smythies <dsmythies@telus.net> Suggested-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: NYu Chen <yu.c.chen@intel.com> [ rjw: Subject/changelog, minor modifications ] Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Wei Yongjun 提交于
Fix to return a negative error code from the clk_get() error handling case instead of 0, as done elsewhere in this function. Fixes: 343a8d17 (cpufreq: scpi: remove arm_big_little dependency) Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 07 2月, 2018 3 次提交
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由 Sudeep Holla 提交于
Commit 343a8d17 (cpufreq: scpi: remove arm_big_little dependency) leads to the following static checker warning: drivers/cpufreq/scpi-cpufreq.c:203 scpi_cpufreq_ready() warn: 'cdev' isn't an ERR_PTR of_cpufreq_cooling_register() returns NULL on error. This patch removes the incorrect IS_ERR check on the returned pointer. Fixes: 343a8d17 (cpufreq: scpi: remove arm_big_little dependency) Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Corentin LABBE 提交于
Since AVR32 arch was removed, at32ap-cpufreq is useless. Remove this driver. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Akshu Agrawal 提交于
In ST/CZ CPUID 8000_0007_EDX[11, ProcFeedbackInterface] is 0, but the mechanism is still available and can be used. Signed-off-by: NAkshu Agrawal <akshu.agrawal@amd.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 05 2月, 2018 1 次提交
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由 Bo Yan 提交于
cpufreq_resume can be called even without preceding cpufreq_suspend. This can happen in following scenario: suspend_devices_and_enter --> dpm_suspend_start --> dpm_prepare --> device_prepare : this function errors out --> dpm_suspend: this is skipped due to dpm_prepare failure this means cpufreq_suspend is skipped over --> goto Recover_platform, due to previous error --> goto Resume_devices --> dpm_resume_end --> dpm_resume --> cpufreq_resume In case schedutil is used as frequency governor, cpufreq_resume will eventually call sugov_start, which does following: memset(sg_cpu, 0, sizeof(*sg_cpu)); .... This effectively erases function pointer for frequency update, causing crash later on. The function pointer would have been set correctly if subsequent cpufreq_add_update_util_hook runs successfully, but that function returns earlier because cpufreq_suspend was not called: if (WARN_ON(per_cpu(cpufreq_update_util_data, cpu))) return; The fix is to check cpufreq_suspended first, if it's false, that means cpufreq_suspend was not called in the first place, so do not resume cpufreq. Signed-off-by: NBo Yan <byan@nvidia.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> [ rjw: Dropped printing a message ] Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 17 1月, 2018 1 次提交
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由 Sudeep Holla 提交于
The dependency on physical_package_id from the topology to get the cluster identifier is wrong. The concept of cluster used in ARM topology is unfortunately not well defined in the architecture, we should avoid using it. Further the frequency domain need not be mapped to so called "clusters" one to one. SCPI already provides means to obtain the frequency domain id from the device tree. In order to support some new topologies(e.g. DSU which contains 2 frequency domains within the physical cluster), pseudo clusters are created to make this driver work which is wrong again. In order to solve those issues and also remove dependency of topological physical id for frequency domain, this patch removes the arm_big_little dependency from scpi driver. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 12 1月, 2018 3 次提交
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由 Shilpasri G Bhat 提交于
Some OpenPOWER boxes can have same pstate values for nominal and pmin pstates. In these boxes the current code will not initialize 'powernv_pstate_info.min' variable and result in erroneous CPU frequency reporting. This patch fixes this problem. Fixes: 09ca4c9b (cpufreq: powernv: Replacing pstate_id with frequency table index) Reported-by: NAlvin Wang <wangat@tw.ibm.com> Signed-off-by: NShilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: 4.8+ <stable@vger.kernel.org> # 4.8+ Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Srinivas Pandruvada 提交于
Currently intel_pstate can function only in HWP mode on Skylake servers. When HWP feature is not enabled on the processor then acpi-cpufreq is driver is used. Based on the power and performance tests using intel_pstate scaling algorithm the results are comparable. But intel_pstate brings in additional features: - Display of turbo frequency range, which many users like to see - Place limits in the turbo frequency range when platform allows Since these tests are done only using non PID algorithm introduced in kernel version 4.14, this patch is not a backport candidate. So each user has to carefully weigh the benefits before he backports. Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Srinivas Pandruvada 提交于
Since core_funcs and bxt_funcs have same set of callbacks, replace bxt_funcs with core_funcs. Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 10 1月, 2018 1 次提交
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由 Anson Huang 提交于
Add 696MHz operating point for i.MX6UL, only for those parts with speed grading fuse set to 2b'10 supports 696MHz operating point, so, speed grading check is also added for i.MX6UL in this patch, the clock tree for each operating point are as below: 696MHz: pll1 696000000 pll1_bypass 696000000 pll1_sys 696000000 pll1_sw 696000000 arm 696000000 528MHz: pll2 528000000 pll2_bypass 528000000 pll2_bus 528000000 ca7_secondary_sel 528000000 step 528000000 pll1_sw 528000000 arm 528000000 396MHz: pll2_pfd2_396m 396000000 ca7_secondary_sel 396000000 step 396000000 pll1_sw 396000000 arm 396000000 198MHz: pll2_pfd2_396m 396000000 ca7_secondary_sel 396000000 step 396000000 pll1_sw 396000000 arm 198000000 Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 05 1月, 2018 4 次提交
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由 Viresh Kumar 提交于
It always returns 0 and none of its callers check its return value. Make it return void. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gautham R. Shenoy 提交于
On POWER8 and POWER9, the PMSR and the PMCR registers define pstates to be 8-bit wide values. The device-tree exports pstates as 32-bit wide values of which the lower byte is the actual pstate. The current implementation in the kernel treats pstates as integer type, since it used to use the sign of the pstate for performing some boundary-checks. This is no longer required after the patch "powernv-cpufreq: Fix pstate_to_idx() to handle non-continguous pstates". So, in this patch, we modify the powernv-cpufreq driver to uniformly treat pstates as opaque 8-bit values obtained from the device-tree or the PMCR. This simplifies the extract_pstate() helper function since we no longer no longer require to worry about the sign-extentions. Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gautham R. Shenoy 提交于
The code in powernv-cpufreq, makes the following two assumptions which are not guaranteed by the device-tree bindings: 1) Pstate ids are continguous: This is used in pstate_to_idx() to obtain the reverse map from a pstate to it's corresponding entry into the cpufreq frequency table. 2) Every Pstate should always lie between the max and the min pstates that are explicitly reported in the device tree: This is used to determine whether a pstate reported by the PMSR is out of bounds. Both these assumptions are unwarranted and can change on future platforms. In this patch, we maintain the reverse map from a pstate to it's index in the cpufreq frequency table and use this in pstate_to_idx(). This does away with the assumptions (1) mentioned above, and will work with non continguous pstate ids. If no entry exists for a particular pstate, then such a pstate is treated as being out of bounds. This gets rid of assumption (2). On all the existing platforms, where the pstates are 8-bit long values, the new implementation of pstate_to_idx() takes constant time. Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gautham R. Shenoy 提交于
On POWERNV platform, the fields for pstates in the Power Management Status Register (PMSR) and the Power Management Control Register (PMCR) are 8-bits wide. On POWER8 the pstates are negatively numbered while on POWER9 they are positively numbered. The device-tree exports pstates as 32-bit entries. The device-tree implementation sign-extends the 8-bit pstate values to obtain the corresponding 32-bit entry. Eg: On POWER8, a pstate value 0x82 [-126] is represented in the device-tree as 0xfffffff82 while on POWER9, the same value 0x82 [130] is represented in the device-tree as 0x00000082. The powernv-cpufreq driver implementation represents pstates using the integer type. In multiple places in the driver, the code interprets the pstates extracted from the PMSR as a signed byte and assigns it to a integer variable to get the sign-extention. On POWER9 platforms which have greater than 128 pstates, this results in the driver performing incorrect sign-extention, and thereby treating a legitimate pstate (say 130) as an invalid pstates (since it is interpreted as -126). This patch fixes the issue by implementing a helper function to extract Pstates from PMSR register, and correctly sign-extend it to be consistent with the values provided by the device-tree. Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com> Acked-by: NBalbir Singh <bsingharora@gmail.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 28 12月, 2017 1 次提交
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由 Dong Aisheng 提交于
Use clk_bulk_get() to simplify the driver's clocks handling. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 18 12月, 2017 4 次提交
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由 Rafael J. Wysocki 提交于
After commit aa7519af (cpufreq: Use transition_delay_us for legacy governors as well) the sampling_rate field of struct dbs_data may be less than the tick period which causes dbs_update() to produce incorrect results, so make the code ensure that the value of that field will always be sufficiently large. Fixes: aa7519af (cpufreq: Use transition_delay_us for legacy governors as well) Reported-by: NAndy Tang <andy.tang@nxp.com> Reported-by: NDoug Smythies <dsmythies@telus.net> Tested-by: NAndy Tang <andy.tang@nxp.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
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由 Lucas Stach 提交于
The commit moving the speed grading check to the cpufreq driver introduced some additional checks, so the OPP disable is only attempted on SoCs where those OPPs are present. The compatible checks are missing the QuadPlus compatible, so invalid OPPs are not correctly disabled there. Move both checks to a single condition, so we don't need to sprinkle even more calls to of_machine_is_compatible(). Fixes: 2b3d58a3 (cpufreq: imx6q: Move speed grading check to cpufreq driver) Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Dave Gerlach 提交于
Some platforms, like those in the DRA7 and AM57 families, require the scaling of multiple regulators in order to properly support higher OPPs. Let the ti-cpufreq driver determine when this is required and pass the appropriate regulator names to the OPP core so that they can be properly managed. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Dave Gerlach 提交于
ti-cpufreq will be responsible for calling dev_pm_opp_set_regulators on platforms that require AVS and ABB regulator support so we must be able to defer probe if regulators are not yet available, so change ti-cpufreq to be a module_platform_driver to allow for probe defer. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 17 12月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
This patch adds DVFS support for the Armada 37xx SoCs There are up to four CPU frequency loads for Armada 37xx controlled by the hardware. This driver associates the CPU load level to a frequency, then the hardware will switch while selecting a load level. The hardware also can associate a voltage for each level (AVS support) but it is not yet supported Tested-by: NAndre Heider <a.heider@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 16 12月, 2017 4 次提交
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由 Gregory CLEMENT 提交于
Since the introduction of this driver, the functions to remove the opp were added. So stop claiming we can't remove opp and use one of them in case of failure. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gregory CLEMENT 提交于
In case of error the clock reference was freed but not in normal path once it was nor more used. This patch fixes it. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gregory CLEMENT 提交于
Keep the driver files alphabetically sorted. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Gregory CLEMENT 提交于
Group all the related big LITTLE configuration together and sort the other entries in alphabetic order. Also fixing tab vs space issue while mofifying these entries. Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 13 12月, 2017 3 次提交
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由 Andrew-sh Cheng 提交于
mediatek projects will use mediate-cpufreq.c as cpufreq driver, instead of using cpufreq_dt.c Add mediatek related projects into cpufreq-dt blacklist Signed-off-by: NAndrew-sh Cheng <andrew-sh.cheng@mediatek.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Andrew-sh Cheng 提交于
Support mt2712 in mediatek-cpufreq.c Signed-off-by: NAndrew-sh Cheng <andrew-sh.cheng@mediatek.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Viresh Kumar 提交于
The commit e948bc8f ("cpufreq: Cap the default transition delay value to 10 ms") caused a regression on EPIA-M min-ITX computer where shutdown or reboot hangs occasionally with a print message like: longhaul: Warning: Timeout while waiting for idle PCI bus cpufreq: __target_index: Failed to change cpu frequency: -16 This probably happens because the cpufreq governor tries to change the frequency of the CPU faster than allowed by the hardware. Before the above commit, the default transition delay was set to 200 ms for a transition_latency of 200000 ns. Lets revert back to that transition delay value to fix it. Note that several other transition delay values were tested like 20 ms and 30 ms and none of them have resolved system hang issue completely. Fixes: e948bc8f (cpufreq: Cap the default transition delay value to 10 ms) Reported-by: NMeelis Roos <mroos@linux.ee> Suggested-by: NRafael J. Wysocki <rjw@rjwysocki.net> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 08 12月, 2017 2 次提交
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由 Viresh Kumar 提交于
of_cpufreq_cooling_register() isn't used by anyone and so can be removed, but then we would be left with two routines: cpufreq_cooling_register() and of_cpufreq_power_cooling_register() that would look odd. Remove current implementation of of_cpufreq_cooling_register() and rename of_cpufreq_power_cooling_register() as of_cpufreq_cooling_register(). This simplifies lots of stuff. Acked-by: NEduardo Valentin <edubezval@gmail.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Viresh Kumar 提交于
All the callers of of_cpufreq_power_cooling_register() have almost identical code and it makes more sense to move that code into the helper as its all about reading DT properties. This got rid of lot of redundant code. Acked-by: NEduardo Valentin <edubezval@gmail.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 04 12月, 2017 4 次提交
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由 Rafael J. Wysocki 提交于
It is possible to remove a cpufreq governor module after cpufreq_parse_governor() has returned success in store_scaling_governor() and before cpufreq_set_policy() acquires a reference to it, because the governor list is not protected during that period and nothing prevents the governor from being unregistered then. Prevent that from happening by acquiring an extra reference to the governor module temporarily in cpufreq_parse_governor(), under cpufreq_governor_mutex, and dropping it in store_scaling_governor(), when cpufreq_set_policy() returns. Note that the second cpufreq_parse_governor() call site is fine, because it only cares about the policy member of new_policy. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Rafael J. Wysocki 提交于
Drop a pointless return statement from cpufreq_unregister_governor(). Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Rafael J. Wysocki 提交于
Pass policy pointer to cpufreq_parse_governor() instead of passing pointers to two members of it so as to make the code slightly more straightforward. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Rafael J. Wysocki 提交于
Drop an unnecessary local variable from cpufreq_parse_governor() and rearrange the code in there to make it easier to follow. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 22 11月, 2017 2 次提交
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由 Jesse Chan 提交于
This change resolves a new compile-time warning when built as a loadable module: WARNING: modpost: missing MODULE_LICENSE() in drivers/cpufreq/mediatek-cpufreq.o see include/linux/module.h for more information This adds the license as "GPL v2", which matches the header of the file. MODULE_DESCRIPTION and MODULE_AUTHOR are also added. Signed-off-by: NJesse Chan <jc@linux.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 James Hogan 提交于
The MIPS loongson cpufreq drivers don't build unless configured for the correct machine type, due to dependency on machine specific architecture headers and symbols in machine specific platform code. More specifically loongson1-cpufreq.c uses RST_CPU_EN and RST_CPU, neither of which is defined in asm/mach-loongson32/regs-clk.h unless CONFIG_LOONGSON1_LS1B=y, and loongson2_cpufreq.c references loongson2_clockmod_table[], which is only defined in arch/mips/loongson64/lemote-2f/clock.c, i.e. when CONFIG_LEMOTE_MACH2F=y. Add these dependencies to Kconfig to avoid randconfig / allyesconfig build failures (e.g. when based on BMIPS which also has a cpufreq driver). Signed-off-by: NJames Hogan <jhogan@kernel.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 09 11月, 2017 2 次提交
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由 Gautham R. Shenoy 提交于
On platforms with large number of Pstates, the transition table, which is a NxN matrix, can overflow beyond the PAGE_SIZE boundary. This can be seen on POWER9 which has 100+ Pstates. As a result, each time the trans_table is read for any of the CPUs, we will get the following error. --------------------------------------------------- fill_read_buffer: show+0x0/0xa0 returned bad count --------------------------------------------------- This patch ensures that in case of an overflow, we print a warning once in the dmesg and return FILE TOO LARGE error for this and all subsequent accesses of trans_table. Signed-off-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Bhumika Goyal 提交于
Make these const as they are only getting passed to the functions bL_cpufreq_{register/unregister} having the arguments as const. Signed-off-by: NBhumika Goyal <bhumirks@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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