- 24 6月, 2011 1 次提交
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由 Guennadi Liakhovetski 提交于
There exist systems with multiple DMA controllers with different capabilities. For example, on some sh-mobile / rmobile systems there are DMA controllers, whose channels can be configured to be used with SD- and MMC-host controllers, serial ports etc. Besides there are also DMA controllers, that can only be used for one special function, e.g., for USB. In such cases the DMA client filter function can just choose to specify to the DMA driver, which channel it needs. Then the .device_alloc_chan_resources() method of the DMA driver will check, whether it can provide that dunction. If not, it will fail and the loop in __dma_request_channel() will continue to the next DMA device, until it finds a suitable one. This works fine with just one minor glitch: the kernel logs error messages like dmaengine: failed to get <channel name>: (-<error code>) after each such non-critical failure. This patch lowers priority of this message to the debug level. Reported-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 16 6月, 2011 1 次提交
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由 H Hartley Sweeten 提交于
The symbol 'ep93xx_dma_prep_dma_memcpy' is only used in this driver and should be marked static. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 09 6月, 2011 1 次提交
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由 Mika Westerberg 提交于
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 06 6月, 2011 3 次提交
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Mika Westerberg 提交于
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 02 6月, 2011 1 次提交
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由 Guennadi Liakhovetski 提交于
A recent patch has introduced a regression, where repeating a memcpy DMA test with shdma module unloading between them skips the DMA channel configuration. Fix this regression by always configuring the channel during its allocation. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 01 6月, 2011 1 次提交
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由 Tomoya MORINAGA 提交于
ISSUE: In case PCH_DMA with I2S communications with ch8~ch11, sometimes I2S data is not send correctly. CAUSE: The following patch I submitted before was not enough modification for supporting DMA ch8~ch11. The modification for status register of ch8~11 was not enough. pch_dma: Support I2S for ML7213 IOH author Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Mon, 9 May 2011 07:09:38 +0000 (16:09 +0900) committer Vinod Koul <vinod.koul@intel.com> Mon, 9 May 2011 11:42:23 +0000 (16:42 +0530) commit 194f5f27 tree c9d4903ea02b18939a4f390956a48be1a3734517 parent 60092d0b This patch fixes the issue. We can confirm PCH_DMA with I2S communications with ch8~ch11 works well. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 31 5月, 2011 1 次提交
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由 Paul Mundt 提交于
The runtime PM changes introduce sh_dmae_rst() wrapping via the runtime_resume helper, depending on dev_get_drvdata() to fetch the platform data needed for the DMAOR initialization default at a time where drvdata hasn't yet been established by the probe path, resulting in general probe misery: Unable to handle kernel NULL pointer dereference at virtual address 000000c4 pc = 8025adee *pde = 00000000 Oops: 0000 [#1] Modules linked in: Pid : 1, Comm: swapper CPU : 0 Not tainted (3.0.0-rc1-00012-g9436b4ab-dirty #1456) PC is at sh_dmae_rst+0x28/0x86 PR is at sh_dmae_rst+0x22/0x86 PC : 8025adee SP : 9e803d10 SR : 400080f1 TEA : 000000c4 R0 : 000000c4 R1 : 0000fff8 R2 : 00000000 R3 : 00000040 R4 : 000000f0 R5 : 00000000 R6 : 00000000 R7 : 804f184c R8 : 00000000 R9 : 804dd0e8 R10 : 80283204 R11 : ffffffda R12 : 000000a0 R13 : 804dd18c R14 : 9e803d10 MACH: 00000000 MACL: 00008f20 GBR : 00000000 PR : 8025ade8 Call trace: [<8025ae70>] sh_dmae_runtime_resume+0x24/0x34 [<80283238>] pm_generic_runtime_resume+0x34/0x3c [<80283370>] rpm_callback+0x4a/0x7e [<80283efc>] rpm_resume+0x240/0x384 [<80283f54>] rpm_resume+0x298/0x384 [<8028428c>] __pm_runtime_resume+0x44/0x7c [<8038a358>] __ioremap_caller+0x0/0xec [<80284296>] __pm_runtime_resume+0x4e/0x7c [<8038a358>] __ioremap_caller+0x0/0xec [<80666254>] sh_dmae_probe+0x180/0x6a0 [<802803ae>] platform_drv_probe+0x26/0x2e Fix up the ordering accordingly. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 27 5月, 2011 3 次提交
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由 Dimitri Sivanich 提交于
For certain system configurations a 5 usec udelay before checking I/OAT DMA channel status is sometimes not sufficient, resulting in a false failure status and unnecessary freeing of channel resources. Conversely, for many configurations 5 usec is longer than necessary. Loop for up to 20 usec waiting for successful status before failing. Signed-off-by: NDimitri Sivanich <sivanich@sgi.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Vinod Koul 提交于
Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Samuel Ortiz 提交于
With the addition of a device platform mfd_cell pointer, MFD drivers can go back to passing platform data back to their sub drivers. This allows for an mfd_cell->mfd_data removal and thus keep the sub drivers MFD agnostic. This is mostly needed for non MFD aware sub drivers. Acked-by: NRichard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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- 25 5月, 2011 4 次提交
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由 Viresh Kumar 提交于
Nobody is currently maintaining dw_dmac. We are using dw_dmac for SPEAr13xx and are currently maintaining it. After discussing with Vinod, sending this patch to update maintainer-ship of dw_dmac. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NHavard Skinnemoen <hskinnemoen@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Magnus Damm 提交于
Update SH_DMAC_MAX_CHANNELS to support the 20 DMA channels included in the sh73a0 SY-DMAC hardware. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
Fix the shdma.c handing of SH_DMAC_MAX_CHANNELS to avoid overwriting the chan_irq[] and chan_flag[] arrays in the case of pdata->channel_num is larger than SH_DMAC_MAX_CHANNELS. With this patch applied up to SH_DMAC_MAX_CHANNELS will be used by the shdma.c driver. If more channels are available in the platform data the user will be notified on the console. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
This patch makes the shdma.c driver allow slave operation on DMA hardware mapped with a single I/O-memory window. The dmae_set_dmars() function is adjusted to use the first memory window in case of a missing DMARS window. At probe() time the code is updated to enable DMA_SLAVE only if slave information is passed with the platform data. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 23 5月, 2011 4 次提交
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由 Paul Gortmaker 提交于
After discovering that wide use of prefetch on modern CPUs could be a net loss instead of a win, net drivers which were relying on the implicit inclusion of prefetch.h via the list headers showed up in the resulting cleanup fallout. Give them an explicit include via the following $0.02 script. ========================================= #!/bin/bash MANUAL="" for i in `git grep -l 'prefetch(.*)' .` ; do grep -q '<linux/prefetch.h>' $i if [ $? = 0 ] ; then continue fi ( echo '?^#include <linux/?a' echo '#include <linux/prefetch.h>' echo . echo w echo q ) | ed -s $i > /dev/null 2>&1 if [ $? != 0 ]; then echo $i needs manual fixup MANUAL="$i $MANUAL" fi done echo ------------------- 8\<---------------------- echo vi $MANUAL ========================================= Signed-off-by: NPaul <paul.gortmaker@windriver.com> [ Fixed up some incorrect #include placements, and added some non-network drivers and the fib_trie.c case - Linus ] Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Guennadi Liakhovetski 提交于
List elements, deleted using list_del_rcu(), cannot be freed without synchronising RCU. Further, the spinlock, used to protect the RCU writer, is called in process context, so, we don't have to save flags. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
This patch extends and fixes runtime power management in the shdma driver to support powering down the DMA controller and adds support for system-level suspend and resume. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Close multiple theoretical races, especially the one in .device_free_chan_resources(). Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 19 5月, 2011 2 次提交
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由 Linus Walleij 提交于
Move the dmaengine subsystem up early in the drivers Makefile so DMA is made available early to all drivers, just like e.g. regulators. Now even regulators can use DMA on the same initlevel. As a result we can bump the ste_dma40 and coh901318 dmaengine drivers down one initlevel to subsys_init(). Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jean Delvare 提交于
Haavard's e-mail address at Atmel is no longer valid. Signed-off-by: NJean Delvare <khali@linux-fr.org> Acked-by: NHavard Skinnemoen <hskinnemoen@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 13 5月, 2011 5 次提交
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由 Linus Walleij 提交于
Some peripherals like amba-pl011 needs pause to be implemented in DMA controller drivers. This also returns correct status from dwc_tx_status() in case chan is paused. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Viresh Kumar 提交于
dmaengine routines can be called from interrupt context and with interrupts disabled. Whereas spin_unlock_bh can't be called from such contexts. So this patch converts all spin_*_bh routines to irqsave variants. Also, spin_lock() used in tasklet is converted to irqsave variants, as tasklet can be interrupted, and dma requests from such interruptions may also call spin_lock. Now, submission from callbacks are permitted as per dmaengine framework. So we shouldn't hold any locks while calling callbacks. As locks were taken by parent routines, so releasing them before calling callbacks doesn't look clean enough. So, locks are taken inside all routine now, whereever they are required. And dwc_descriptor_complete is always called without taking locks. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Viresh Kumar 提交于
If len passed in sg for slave_sg transfers is greater than DWC_MAX_COUNT, then driver programmes controller incorrectly. This patch adds code to handle this situation by allocation more than one desc for same sg. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Viresh Kumar 提交于
If transfer status is !=DMA_SUCCESS, return total transfer len as residue, instead of zero. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Viresh Kumar 提交于
If dmaengine_terminate_all() is called for dma channel, then it doesn't make much sense to call registered callback routine. While in case of success or failure it must be called. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 12 5月, 2011 1 次提交
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由 Nicolas Ferre 提交于
With the addition of the "pause" feature, an active wait was introduced to check the "FIFO empty" event. This event was not always happening and a timout contition was needed. But, in some cases, this event depend on the peripheral connected to the channel that is paused: FIFO becomes empty if the peripheral consumes data. The timeout is pretty difficult to evaluate. Moreover, this check is not needed. In conclusion, it seems sensible to entirely remove the checking of "FIFO empty" status when pausing. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> [commit msg edited for grammer] Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 09 5月, 2011 10 次提交
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由 Tomoya MORINAGA 提交于
Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Support new device OKI SEMICONDUCTOR ML7223 IOH(Input/Output Hub). The ML7223 IOH is for MP(Media Phone) use. The ML7223 is companion chip for Intel Atom E6xx series. The ML7223 is completely compatible for Intel EG20T PCH. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Support I2S device for ML7213 IOH Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Currently, Direct-Start mode(*) is enabled. Our IOH's devices must not use this mode. This causes unexpected behavior. This patch deletes Direct-Start setting. (*) This mode is used in order for CPU to generate the DMA request. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Fix checkpatch warnings. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Currently, even-channel number is set as tx direction and odd is set as rx. However, though video-in uses ch6, the direction is not tx but rx. This patch sets video-in's DMA direction correctly. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
A little function helps to chain descriptors: it is already used in cyclic dma operations, now use it in memcpy and slave_sg preparation functions. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Pause and resume controls are useful for audio devices. This also returns correct status from atc_tx_status() in case chan is paused. Idea from dw_dmac patch by Linus Walleij. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
If transfer status is !=DMA_SUCCESS, return total transfer len as residue, instead of zero. Idea from dw_dmac patch by Viresh Kumar. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Philippe Langlais 提交于
The compiler nowadays moans about possibly non-assigned variable. Fix this by default-assigning 0. Signed-off-by: NPhilippe Langlais <philippe.langlais@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 02 5月, 2011 2 次提交
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由 Nicolas Ferre 提交于
DMA controller has two AHB interfaces on the SOC internal matrix. It is more efficient to specialize each interface as the access to memory can introduce latencies that are not compatible with peripheral accesses requirements. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
There is no need to test if channel is enabled in tasklet: - in error path, channel is disabled in interrupt routine - in normal path, this test is performed in sub functions to report a misuse of the engine. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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