1. 10 8月, 2009 1 次提交
  2. 11 7月, 2009 2 次提交
  3. 10 7月, 2009 2 次提交
  4. 05 7月, 2009 1 次提交
    • I
      x86: Further clean up of mtrr/generic.c · e3d0e692
      Ingo Molnar 提交于
      Yinghai noticed that i defined BIOS_BUG_MSG but added no
      usage for it. The usage is to clean up this turd in generic.c:
      
      			printk(KERN_WARNING "WARNING: BIOS bug: VAR MTRR %d "
      				"contains strange UC entry under 1M, check "
      				"with your system vendor!\n", i);
      
      Breaking printk lines in the middle looks ugly, is hard to read
      and breaks 'git grep'. Use the BIOS_BUG_MSG instead.
      
      Also complete the moving of structure definitions and variables
      to the top of the file.
      Reported-by: NYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e3d0e692
  5. 04 7月, 2009 9 次提交
    • J
      x86: Clean up mtrr/main.c · dbd51be0
      Jaswinder Singh Rajput 提交于
      Fix following trivial style problems:
      
        ERROR: trailing whitespace X 25
        WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h>
        WARNING: Use #include <linux/kvm_para.h> instead of <asm/kvm_para.h>
        ERROR: do not initialise externals to 0 or NULL X 2
        ERROR: "foo * bar" should be "foo *bar" X 5
        ERROR: do not use assignment in if condition X 2
        WARNING: line over 80 characters X 8
        ERROR: return is not a function, parentheses are not required
        WARNING: braces {} are not necessary for any arm of this statement
        ERROR: space required before the open parenthesis '(' X 2
        ERROR: open brace '{' following function declarations go on the next line
        ERROR: space required after that ',' (ctx:VxV) X 8
        ERROR: space required before the open parenthesis '(' X 3
        ERROR: else should follow close brace '}'
        WARNING: space prohibited between function name and open parenthesis '('
        WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable X 2
      
      Also use pr_debug and pr_warning where possible.
      
      total: 50 errors, 14 warnings
      
      arch/x86/kernel/cpu/mtrr/main.o:
      
         text	   data	    bss	    dec	    hex	filename
         3668	    116	   4156	   7940	   1f04	main.o.before
         3668	    116	   4156	   7940	   1f04	main.o.after
      
      md5:
         e01af2fd28deef77c8d01e71acfbd365  main.o.before.asm
         e01af2fd28deef77c8d01e71acfbd365  main.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      Cc: Avi Kivity <avi@redhat.com> # Avi, please have a look at the kvm_para.h bit
      [ More cleanups ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      dbd51be0
    • J
      x86: Clean up mtrr/state.c · 09b22c85
      Jaswinder Singh Rajput 提交于
      Fix:
      
        WARNING: Use #include <linux/io.h> instead of <asm/io.h>
        WARNING: line over 80 characters X 4
      
      arch/x86/kernel/cpu/mtrr/state.o:
      
         text	   data	    bss	    dec	    hex	filename
          864	      0	      0	    864	    360	state.o.before
          864	      0	      0	    864	    360	state.o.after
      
      md5:
         c5c4364b9aeac74d70111e1e49667a2c  state.o.before.asm
         c5c4364b9aeac74d70111e1e49667a2c  state.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ More cleanups ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      09b22c85
    • J
      x86: Clean up mtrr/mtrr.h · 3ec8dbcb
      Jaswinder Singh Rajput 提交于
      Fix:
      
        ERROR: do not use C99 // comments
        ERROR: "foo * bar" should be "foo *bar" X 2
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ More tidyups ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3ec8dbcb
    • J
      x86: Clean up mtrr/if.c · 26dc67ed
      Jaswinder Singh Rajput 提交于
      Fix:
      
        WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h>
        ERROR: trailing whitespace X 7
        ERROR: trailing statements should be on next line X 3
        WARNING: line over 80 characters X 5
        ERROR: space required before the open parenthesis '('
      
      arch/x86/kernel/cpu/mtrr/if.o:
      
         text	   data	    bss	    dec	    hex	filename
         2239	      4	      0	   2243	    8c3	if.o.before
         2239	      4	      0	   2243	    8c3	if.o.after
      
      md5:
         78d1f2aa4843ec6509c18e2dee54bc7f  if.o.before.asm
         78d1f2aa4843ec6509c18e2dee54bc7f  if.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ More cleanups to make the code more consistent. ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      26dc67ed
    • J
      x86: Clean up mtrr/generic.c · a1a499a3
      Jaswinder Singh Rajput 提交于
      Fix following trivial style problems:
      
        ERROR: trailing whitespace X 4
        WARNING: Use #include <linux/io.h> instead of <asm/io.h>
        WARNING: braces {} are not necessary for single statement blocks X 3
        ERROR: "foo * bar" should be "foo *bar"
        WARNING: line over 80 characters X 6
        ERROR: "foo * bar" should be "foo *bar"
        ERROR: spaces required around that '=' (ctx:VxO)
        ERROR: space required before that '-' (ctx:OxV)
        WARNING: suspect code indent for conditional statements (8, 12)
        ERROR: spaces required around that '=' (ctx:VxV)
        ERROR: do not initialise statics to 0 or NULL
        ERROR: space prohibited after that open parenthesis '(' X 2
        ERROR: space prohibited before that close parenthesis ')' X 2
        ERROR: trailing statements should be on next line
        ERROR: return is not a function, parentheses are not required
      
      Also use pr_debug and pr_warning where possible.
      
      arch/x86/kernel/cpu/mtrr/generic.o:
      
         text	   data	    bss	    dec	    hex	filename
         5652	     77	   4224	   9953	   26e1	generic.o.before
         5652	     77	   4220	   9949	   26dd	generic.o.after
      
      The md5 changed:
         b34d6c045f06daa4ed092b90cc760e8f  generic.o.before.asm
         a490c6251cfd8442fbffecc0e09a573d  generic.o.after.asm
      
      Because mtrr_state moved from data to bss, changing its
      offsets - and also because __LINE__ numbers changed.
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Further cleanups to make the code more consistent ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a1a499a3
    • J
      x86: Clean up mtrr/cyrix.c · 23110377
      Jaswinder Singh Rajput 提交于
      Fix trivial style problems:
      
        WARNING: Use #include <linux/io.h> instead of <asm/io.h>
        WARNING: line over 80 characters
        ERROR: do not initialise statics to 0 or NULL
        ERROR: space prohibited after that open parenthesis '(' X 2
        ERROR: space prohibited before that close parenthesis ')' X 2
        ERROR: trailing whitespace X 2
        ERROR: trailing statements should be on next line
        ERROR: do not use C99 // comments X 2
      
      arch/x86/kernel/cpu/mtrr/cyrix.o:
      
         text	   data	    bss	    dec	    hex	filename
         1637	     32	      8	   1677	    68d	cyrix.o.before
         1637	     32	      8	   1677	    68d	cyrix.o.after
      
      md5:
         6f52abd06905be3f4cabb5239f9b0ff0  cyrix.o.before.asm
         6f52abd06905be3f4cabb5239f9b0ff0  cyrix.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Made the code more consistent ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      23110377
    • J
      x86: Clean up mtrr/cleanup.c · 63f9600f
      Jaswinder Singh Rajput 提交于
      Fix trivial style problems:
      
        WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h>
        WARNING: Use #include <linux/kvm_para.h> instead of <asm/kvm_para.h>
      
      Also, nr_mtrr_spare_reg should be unsigned long.
      
      arch/x86/kernel/cpu/mtrr/cleanup.o:
      
         text	   data	    bss	    dec	    hex	filename
         6241	   8992	   2056	  17289	   4389	cleanup.o.before
         6241	   8992	   2056	  17289	   4389	cleanup.o.after
      
      The md5 has changed:
         1a7a27513aef1825236daf29110fe657  cleanup.o.before.asm
         bcea358efa2532b6020e338e158447af  cleanup.o.after.asm
      
      Because a WARN_ON()'s __LINE__ value changed by 3 lines.
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Did lots of other cleanups to make the code look more consistent. ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      63f9600f
    • J
      x86: Clean up mtrr/centaur.c · 6c4caa1a
      Jaswinder Singh Rajput 提交于
      Remove dead code and fix trivial style problems:
      
        ERROR: trailing whitespace X 2
        WARNING: line over 80 characters X 3
        ROR: trailing whitespace
        ERROR: do not use C99 // comments X 2
      
      arch/x86/kernel/cpu/mtrr/centaur.o:
      
         text	   data	    bss	    dec	    hex	filename
          605	     32	     68	    705	    2c1	centaur.o.before
          605	     32	     68	    705	    2c1	centaur.o.after
      
      md5:
         a4865ea98ce3c163bb1d376a3949b3e3  centaur.o.before.asm
         a4865ea98ce3c163bb1d376a3949b3e3  centaur.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Standardized comments, DocBook, curly braces, newlines. ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      6c4caa1a
    • J
      x86: Clean up mtrr/amd.c: · 42204455
      Jaswinder Singh Rajput 提交于
      Fix trivial style problems :
      
        ERROR: trailing whitespace
        WARNING: line over 80 characters
        ERROR: do not use C99 // comments
      
      arch/x86/kernel/cpu/mtrr/amd.o:
      
         text	   data	    bss	    dec	    hex	filename
          501	     32	      0	    533	    215	amd.o.before
          501	     32	      0	    533	    215	amd.o.after
      
      md5:
         62f795eb840ee2d17b03df89e789e76c  amd.o.before.asm
         62f795eb840ee2d17b03df89e789e76c  amd.o.after.asm
      Suggested-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090703164225.GA21447@elte.hu>
      [ Also restructured comments to be standard, removed stray return,
        converted function description to DocBook style, etc. ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      42204455
  6. 03 7月, 2009 1 次提交
  7. 02 7月, 2009 1 次提交
  8. 29 6月, 2009 1 次提交
  9. 28 6月, 2009 1 次提交
    • H
      Revert "x86: cap iomem_resource to addressable physical memory" · ff8a4bae
      H. Peter Anvin 提交于
      This reverts commit 95ee14e4.
      Mikael Petterson <mikepe@it.uu.se> reported that at least one of his
      systems will not boot as a result.  We have ruled out the detection
      algorithm malfunctioning, so it is not a matter of producing the
      incorrect bitmasks; rather, something in the application of them
      fails.
      
      Revert the commit until we can root cause and correct this problem.
      
      -stable team: this means the underlying commit should be rejected.
      Reported-and-isolated-by: NMikael Petterson <mikpe@it.uu.se>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      LKML-Reference: <200906261559.n5QFxJH8027336@pilspetsen.it.uu.se>
      Cc: stable@kernel.org
      Cc: Grant Grundler <grundler@parisc-linux.org>
      ff8a4bae
  10. 26 6月, 2009 3 次提交
  11. 24 6月, 2009 3 次提交
    • C
      x86: Fix uv bau sending buffer initialization · 9c26f52b
      Cliff Wickman 提交于
      The initialization of the UV Broadcast Assist Unit's sending
      buffers was making an invalid assumption about the
      initialization of an MMR that defines its address.
      
      The BIOS will not be providing that MMR.  So
      uv_activation_descriptor_init() should unconditionally set it.
      
      Tested on UV simulator.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: <stable@kernel.org> # for v2.6.30.x
      LKML-Reference: <E1MJTfj-0005i1-W8@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9c26f52b
    • Y
      perf_counter, x86: Set global control MSR correctly · c14dab5c
      Yong Wang 提交于
      Previous code made an assumption that the power on value of global
      control MSR has enabled all fixed and general purpose counters properly.
      
      However, this is not the case for certain Intel processors, such as
      Atom - and it might also be firmware dependent.
      
      Each enable bit in IA32_PERF_GLOBAL_CTRL is AND'ed with the
      enable bits for all privilege levels in the respective IA32_PERFEVTSELx
      or IA32_PERF_FIXED_CTR_CTRL MSRs to start/stop the counting of
      respective counters. Counting is enabled if the AND'ed results is true;
      counting is disabled when the result is false.
      
      The end result is that all fixed counters are always disabled on Atom
      processors because the assumption is just invalid.
      
      Fix this by not initializing the ctrl-mask out of the global MSR,
      but setting it to perf_counter_mask.
      Reported-by: NStephane Eranian <eranian@googlemail.com>
      Signed-off-by: NYong Wang <yong.y.wang@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Paul Mackerras <paulus@samba.org>
      LKML-Reference: <20090624021324.GA2788@ywang-moblin2.bj.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c14dab5c
    • W
      Intel-IOMMU, intr-remap: source-id checking · f007e99c
      Weidong Han 提交于
      To support domain-isolation usages, the platform hardware must be
      capable of uniquely identifying the requestor (source-id) for each
      interrupt message. Without source-id checking for interrupt remapping
      , a rouge guest/VM with assigned devices can launch interrupt attacks
      to bring down anothe guest/VM or the VMM itself.
      
      This patch adds source-id checking for interrupt remapping, and then
      really isolates interrupts for guests/VMs with assigned devices.
      
      Because PCI subsystem is not initialized yet when set up IOAPIC
      entries, use read_pci_config_byte to access PCI config space directly.
      Signed-off-by: NWeidong Han <weidong.han@intel.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      f007e99c
  12. 23 6月, 2009 1 次提交
    • P
      x86: Move init_gbpages() to setup_arch() · 854c879f
      Pekka J Enberg 提交于
      The init_gbpages() function is conditionally called from
      init_memory_mapping() function. There are two call-sites where
      this 'after_bootmem' condition can be true: setup_arch() and
      mem_init() via pci_iommu_alloc().
      
      Therefore, it's safe to move the call to init_gbpages() to
      setup_arch() as it's always called before mem_init().
      
      This removes an after_bootmem use - paving the way to remove
      all uses of that state variable.
      Signed-off-by: NPekka Enberg <penberg@cs.helsinki.fi>
      Acked-by: NYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <Pine.LNX.4.64.0906221731210.19474@melkki.cs.Helsinki.FI>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      854c879f
  13. 22 6月, 2009 6 次提交
    • T
      x86: ensure percpu lpage doesn't consume too much vmalloc space · 0017c869
      Tejun Heo 提交于
      On extreme configuration (e.g. 32bit 32-way NUMA machine), lpage
      percpu first chunk allocator can consume too much of vmalloc space.
      Make it fall back to 4k allocator if the consumption goes over 20%.
      
      [ Impact: add sanity check for lpage percpu first chunk allocator ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NJan Beulich <JBeulich@novell.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      0017c869
    • T
      x86: implement percpu_alloc kernel parameter · fa8a7094
      Tejun Heo 提交于
      According to Andi, it isn't clear whether lpage allocator is worth the
      trouble as there are many processors where PMD TLB is far scarcer than
      PTE TLB.  The advantage or disadvantage probably depends on the actual
      size of percpu area and specific processor.  As performance
      degradation due to TLB pressure tends to be highly workload specific
      and subtle, it is difficult to decide which way to go without more
      data.
      
      This patch implements percpu_alloc kernel parameter to allow selecting
      which first chunk allocator to use to ease debugging and testing.
      
      While at it, make sure all the failure paths report why something
      failed to help determining why certain allocator isn't working.  Also,
      kill the "Great future plan" comment which had already been realized
      quite some time ago.
      
      [ Impact: allow explicit percpu first chunk allocator selection ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NJan Beulich <JBeulich@novell.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      fa8a7094
    • T
      x86: fix pageattr handling for lpage percpu allocator and re-enable it · e59a1bb2
      Tejun Heo 提交于
      lpage allocator aliases a PMD page for each cpu and returns whatever
      is unused to the page allocator.  When the pageattr of the recycled
      pages are changed, this makes the two aliases point to the overlapping
      regions with different attributes which isn't allowed and known to
      cause subtle data corruption in certain cases.
      
      This can be handled in simliar manner to the x86_64 highmap alias.
      pageattr code should detect if the target pages have PMD alias and
      split the PMD alias and synchronize the attributes.
      
      pcpur allocator is updated to keep the allocated PMD pages map sorted
      in ascending address order and provide pcpu_lpage_remapped() function
      which binary searches the array to determine whether the given address
      is aliased and if so to which address.  pageattr is updated to use
      pcpu_lpage_remapped() to detect the PMD alias and split it up as
      necessary from cpa_process_alias().
      
      Jan Beulich spotted the original problem and incorrect usage of vaddr
      instead of laddr for lookup.
      
      With this, lpage percpu allocator should work correctly.  Re-enable
      it.
      
      [ Impact: fix subtle lpage pageattr bug and re-enable lpage ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Reported-by: NJan Beulich <JBeulich@novell.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      e59a1bb2
    • T
      x86: prepare setup_pcpu_lpage() for pageattr fix · 0ff2587f
      Tejun Heo 提交于
      Make the following changes in preparation of coming pageattr updates.
      
      * Define and use array of struct pcpul_ent instead of array of
        pointers.  The only difference is ->cpu field which is set but
        unused yet.
      
      * Rename variables according to the above change.
      
      * Rename local variable vm to pcpul_vm and move it out of the
        function.
      
      [ Impact: no functional difference ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Jan Beulich <JBeulich@novell.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      0ff2587f
    • T
      x86: rename remap percpu first chunk allocator to lpage · 97c9bf06
      Tejun Heo 提交于
      The "remap" allocator remaps large pages to build the first chunk;
      however, the name isn't very good because 4k allocator remaps too and
      the whole point of the remap allocator is using large page mapping.
      The allocator will be generalized and exported outside of x86, rename
      it to lpage before that happens.
      
      percpu_alloc kernel parameter is updated to accept both "remap" and
      "lpage" for lpage allocator.
      
      [ Impact: code cleanup, kernel parameter argument updated ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      97c9bf06
    • T
      x86: fix duplicate free in setup_pcpu_remap() failure path · c5806df9
      Tejun Heo 提交于
      In the failure path, setup_pcpu_remap() tries to free the area which
      has already been freed to make holes in the large page.  Fix it.
      
      [ Impact: fix duplicate free in failure path ]
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      c5806df9
  14. 21 6月, 2009 2 次提交
    • J
      perf_counter, x8: Fix L1-data-Cache-Store-Referencees for AMD · d9f2a5ec
      Jaswinder Singh Rajput 提交于
      Fix AMD's Data Cache Refills from System event.
      
      After this patch :
      
       ./tools/perf/perf stat -e l1d -e l1d-misses -e l1d-write -e l1d-prefetch -e l1d-prefetch-miss -e l1i -e l1i-misses -e l1i-prefetch -e l2 -e l2-misses -e l2-write -e dtlb -e dtlb-misses -e itlb -e itlb-misses -e bpu -e bpu-misses ls /dev/ > /dev/null
      
       Performance counter stats for 'ls /dev/':
      
              2499484  L1-data-Cache-Load-Referencees             (scaled from 3.97%)
                70347  L1-data-Cache-Load-Misses                  (scaled from 7.30%)
                 9360  L1-data-Cache-Store-Referencees            (scaled from 8.64%)
                32804  L1-data-Cache-Prefetch-Referencees         (scaled from 17.72%)
                 7693  L1-data-Cache-Prefetch-Misses              (scaled from 22.97%)
              2180945  L1-instruction-Cache-Load-Referencees      (scaled from 28.48%)
                14518  L1-instruction-Cache-Load-Misses           (scaled from 35.00%)
                 2405  L1-instruction-Cache-Prefetch-Referencees  (scaled from 34.89%)
                71387  L2-Cache-Load-Referencees                  (scaled from 34.94%)
                18732  L2-Cache-Load-Misses                       (scaled from 34.92%)
                79918  L2-Cache-Store-Referencees                 (scaled from 36.02%)
              1295294  Data-TLB-Cache-Load-Referencees            (scaled from 35.99%)
                30896  Data-TLB-Cache-Load-Misses                 (scaled from 33.36%)
              1222030  Instruction-TLB-Cache-Load-Referencees     (scaled from 29.46%)
                  357  Instruction-TLB-Cache-Load-Misses          (scaled from 20.46%)
               530888  Branch-Cache-Load-Referencees              (scaled from 11.48%)
                 8638  Branch-Cache-Load-Misses                   (scaled from 5.09%)
      
          0.011295149  seconds time elapsed.
      
      Earlier it always shows value 0.
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      LKML-Reference: <1245484165.3102.6.camel@localhost.localdomain>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d9f2a5ec
    • A
      x86: Set cpu_llc_id on AMD CPUs · 99bd0c0f
      Andreas Herrmann 提交于
      This counts when building sched domains in case NUMA information
      is not available.
      
      ( See cpu_coregroup_mask() which uses llc_shared_map which in turn is
        created based on cpu_llc_id. )
      
      Currently Linux builds domains as follows:
      (example from a dual socket quad-core system)
      
       CPU0 attaching sched-domain:
        domain 0: span 0-7 level CPU
         groups: 0 1 2 3 4 5 6 7
      
        ...
      
       CPU7 attaching sched-domain:
        domain 0: span 0-7 level CPU
         groups: 7 0 1 2 3 4 5 6
      
      Ever since that is borked for multi-core AMD CPU systems.
      This patch fixes that and now we get a proper:
      
       CPU0 attaching sched-domain:
        domain 0: span 0-3 level MC
         groups: 0 1 2 3
         domain 1: span 0-7 level CPU
          groups: 0-3 4-7
      
        ...
      
       CPU7 attaching sched-domain:
        domain 0: span 4-7 level MC
         groups: 7 4 5 6
         domain 1: span 0-7 level CPU
          groups: 4-7 0-3
      
      This allows scheduler to assign tasks to cores on different sockets
      (i.e. that don't share last level cache) for performance reasons.
      Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
      LKML-Reference: <20090619085909.GJ5218@alberich.amd.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      99bd0c0f
  15. 20 6月, 2009 2 次提交
    • J
      x86: ds.c fix invalid assignment · feaa0457
      Jaswinder Singh Rajput 提交于
      Fixes the type mixups that cause the following sparse warnings:
      
        CHECK   arch/x86/kernel/ds.c
      arch/x86/kernel/ds.c:549:19: warning: incorrect type in argument 2 (invalid types)
      arch/x86/kernel/ds.c:549:19:    expected bad type enum bts_field field
      arch/x86/kernel/ds.c:549:19:    got int
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:514:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:514:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:514:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:514:7: error: invalid assignment
      arch/x86/kernel/ds.c:520:35: error: incompatible types for operation (*)
      arch/x86/kernel/ds.c:520:35:    left side has type unsigned char static [unsigned] [toplevel] sizeof_ptr_field
      arch/x86/kernel/ds.c:520:35:    right side has type bad type enum bts_field field
      arch/x86/kernel/ds.c:520:7: error: invalid assignment
      arch/x86/kernel/ds.c:520:35: error: incompatible types for operation (*)
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Cc: Markus Metzger <markus.t.metzger@intel.com>
      LKML-Reference: <1245494740.8613.12.camel@localhost.localdomain>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      feaa0457
    • P
      ACPI: pdc init related memory leak with physical CPU hotplug · 7b768f07
      Pallipadi, Venkatesh 提交于
      arch_acpi_processor_cleanup_pdc() in x86 and ia64 results in memory allocated
      for _PDC objects that is never freed and will cause memory leak in case of
      physical CPU remove and add. Patch fixes the memory leak by freeing the
      objects soon after _PDC is evaluated.
      Reported-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      7b768f07
  16. 19 6月, 2009 3 次提交
    • P
      perf_counter: Make callchain samples extensible · f9188e02
      Peter Zijlstra 提交于
      Before exposing upstream tools to a callchain-samples ABI, tidy it
      up to make it more extensible in the future:
      
      Use markers in the IP chain to denote context, use (u64)-1..-4095 range
      for these context markers because we use them for ERR_PTR(), so these
      addresses are unlikely to be mapped.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f9188e02
    • S
      function-graph: add stack frame test · 71e308a2
      Steven Rostedt 提交于
      In case gcc does something funny with the stack frames, or the return
      from function code, we would like to detect that.
      
      An arch may implement passing of a variable that is unique to the
      function and can be saved on entering a function and can be tested
      when exiting the function. Usually the frame pointer can be used for
      this purpose.
      
      This patch also implements this for x86. Where it passes in the stack
      frame of the parent function, and will test that frame on exit.
      
      There was a case in x86_32 with optimize for size (-Os) where, for a
      few functions, gcc would align the stack frame and place a copy of the
      return address into it. The function graph tracer modified the copy and
      not the actual return address. On return from the funtion, it did not go
      to the tracer hook, but returned to the parent. This broke the function
      graph tracer, because the return of the parent (where gcc did not do
      this funky manipulation) returned to the location that the child function
      was suppose to. This caused strange kernel crashes.
      
      This test detected the problem and pointed out where the issue was.
      
      This modifies the parameters of one of the functions that the arch
      specific code calls, so it includes changes to arch code to accommodate
      the new prototype.
      
      Note, I notice that the parsic arch implements its own push_return_trace.
      This is now a generic function and the ftrace_push_return_trace should be
      used instead. This patch does not touch that code.
      
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      71e308a2
    • P
      gcov: enable GCOV_PROFILE_ALL for x86_64 · 7bf99fb6
      Peter Oberparleiter 提交于
      Enable gcov profiling of the entire kernel on x86_64. Required changes
      include disabling profiling for:
      
      * arch/kernel/acpi/realmode and arch/kernel/boot/compressed:
        not linked to main kernel
      * arch/vdso, arch/kernel/vsyscall_64 and arch/kernel/hpet:
        profiling causes segfaults during boot (incompatible context)
      Signed-off-by: NPeter Oberparleiter <oberpar@linux.vnet.ibm.com>
      Cc: Andi Kleen <andi@firstfloor.org>
      Cc: Huang Ying <ying.huang@intel.com>
      Cc: Li Wei <W.Li@Sun.COM>
      Cc: Michael Ellerman <michaele@au1.ibm.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Heiko Carstens <heicars2@linux.vnet.ibm.com>
      Cc: Martin Schwidefsky <mschwid2@linux.vnet.ibm.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: WANG Cong <xiyou.wangcong@gmail.com>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Al Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7bf99fb6
  17. 18 6月, 2009 1 次提交