- 11 12月, 2008 1 次提交
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由 Josh Boyer 提交于
The cuboot-acadia.c wrapper can cause assembler errors on some toolchains due to the lack of the proper BOOTCFLAGS. This adds the proper flags for the file. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 03 12月, 2008 1 次提交
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由 Anton Vorontsov 提交于
Just found the merge issue in 44274698 ("powerpc/83xx: Add support for MCU microcontroller in .dts files"): the commit adds the MCU controller node into the DMA node, which is wrong because the MCU sits on the I2C bus. Fix this by moving the MCU node into the I2C controller node. The original patch[1] was OK though. ;-) Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 20 11月, 2008 2 次提交
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由 Michael Barkowski 提交于
ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so that the interfaces do not swap addresses when control passes from U-Boot to the kernel. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Trent Piepho 提交于
It's 1MB, not 512KB. Newer U-Boots will fix this entry, but that's no reason to have the wrong value in the dts. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 09 11月, 2008 1 次提交
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由 Martyn Welch 提交于
This patch corrects the bus-frequency value provided in the SBC610's dts. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 31 10月, 2008 4 次提交
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由 Paul Mackerras 提交于
This reverts commit 91a00302, plus commit 0dcd4401 ("powerpc: Revert CHRP boot wrapper to real-base = 12MB on 32-bit") which depended on it. Commit 91a00302 was causing NVRAM corruption on some pSeries machines, for as-yet unknown reasons, so this reverts it until the cause is identified. Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Jon Smirl 提交于
Fix format string warning in arch/powerpc/boot/main.c. Also correct a typo ("uncomressed") on the same line. BOOTCC arch/powerpc/boot/main.o arch/powerpc/boot/main.c: In function 'prep_kernel': arch/powerpc/boot/main.c:65: warning: format '%08x' expects type 'unsigned int', but argument 3 has type 'long unsigned int' Signed-off-by: NJon Smirl <jonsmirl@gmail.com> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 David Gibson 提交于
There's currently an off-by-one bug in fdt_subnode_offset_namelen() which causes it to keep searching after it's finished the subnodes of the given parent, and into the subnodes of siblings of the original node which come after it in the tree. This bug was introduced in commit ed95d745 ("powerpc: Update in-kernel dtc and libfdt to version 1.2.0"). A patch has already been submitted to dtc/libfdt mainline. We don't really want to pull in a new upstream version during the 2.6.28 cycle, but we should still fix this bug, hence this standalone version of the fix for the in-kernel libfdt. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Mike Dyer 提交于
Commit 57436612 added a duplicate DMA controller node. Signed-off-by: NMike Dyer <mike.dyer@provision-comm.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 22 10月, 2008 1 次提交
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由 Mike Ditto 提交于
Some platforms have variants that can share most of a flat device tree but need a few devices selectively pruned at boot time. This adds del_node() to ops.h to allow access to the existing fdt_del_node(). Signed-off-by: NMike Ditto <mditto@consentry.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 21 10月, 2008 10 次提交
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由 Anton Vorontsov 提交于
The RTC is sitting on the I2C2 bus at address 0x68. RTC interrupt signal is connected to the IPIC's EXT2 interrupt line, the line is shared with Vitesse 8201 Ethernet PHY. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
MCU is an external Freescale MC9S08QG8 microcontroller, mainly used to provide soft power-off function, but also exports two GPIOs (wired to the LEDs and also available from the external headers). Added the MCU on mpc8349emitx, mpc837xrdb and mpc8315erdb boards. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Change the top-level #address-cells and #size-cells to <2> so the mpc8572ds.dts is easier to deal with both a true 32-bit physical or 36-bit physical address space. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
We don't want to encourage the bogus device_type usage. The device type isn't used in the code, so we can simply remove it from the documentation and dts files. Boards should specify proper compatible entries instead. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Ed Swarthout 提交于
Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jason Jin 提交于
Signed-off-by: NJason Jin <Jason.jin@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Paul Mackerras 提交于
Commit 9b09c6d9 ("powerpc: Change the default link address for pSeries zImage kernels") changed the real-base value in the CHRP note added by addnote to the zImage from 12MB to 32MB. It turns out that this causes unnecessary extra reboots on old 32-bit CHRP machines. This therefore adds a -r flag to addnote to allow us to specify what real-base value it should put in the CHRP note, and adjusts the wrapper script to pass -r c00000 to addnote when making a zImage for a CHRP machine. Also, CHRP machines ignore the RPA note, so we don't need to arrange for it to be the same as the kernel's. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Grant Likely 提交于
This target is needed to build cuImages with an embedded ramdisk image. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Mike Ditto 提交于
I noticed, when trying to use, e.g., node = find_node_by_prop_value(prev, "booleanprop", "", 0)) to search for all nodes with a certain boolean property, that memcmp() returns garbage when comparing zero bytes. It should return zero. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Sebastian Siewior 提交于
If the vmlinux binary in memory is larger than 4 MiB than it collides with the initial boot code which is linked at 4 MiB in case of cuBoot. If the the uncompressed image size (on disk size) is less than 4 MiB then it would fit. The difference between those two sizes is the bss section. In cuBoot we have the dtb embedded right after the data section so it is very likely that the reset of the bss section (in kernel's start up code) will overwrite the dtb blob. Therefore we reallocate the dtb. Something similar is allready done to the initrd. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 18 10月, 2008 1 次提交
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由 Niklaus Giger 提交于
Adds support for a HCU4 PPC405GPr based board from Netstal Maschinen AG. Signed-off-by: NNiklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 17 10月, 2008 2 次提交
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由 Josh Boyer 提交于
This adds a cuboot wrapper for the AMCC PowerPC 405EZ Acadia board. The clocking code is derived from U-Boot, originally written by Stefan Roese. Signed-off-by: NJosh Boyer <jwboyer@linux.ibm.com>
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由 Josh Boyer 提交于
Add the base DTS for the AMCC PowerPC 405EZ Acadia evalution board. In addition to some of the normal PPC 40x peripherals, the Acadia board has: - 64 MiB PSRAM - NOR and NAND flash - Two USB 1.1 host ports - Two CAN 2.0 ports - ADC and DAC connectors - LCD display This adds the basic platform support to build from. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 16 10月, 2008 1 次提交
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由 Grant Likely 提交于
Current device trees do not have the device_type = soc property set anymore. Fix up the cuImage bootwrapper fragment to still find the IMMR nodes. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 14 10月, 2008 8 次提交
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由 Anton Vorontsov 提交于
The StMicro NAND chip (512Mbit, 64MB) is connected to the local bus, the first local bus' user-programmable machine is configured by the firmware to work with NAND chips. QE GPIO pin is used to poll the NAND's Ready-Not-Busy signal. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Martyn Welch 提交于
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This patch adds support for the registers held in the devices main FPGA, exposing extra information about the revision of the board through cpuinfo. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
The Freescale Elo DMA driver binds to all DMA channels in the device tree that are compatible with "fsl,eloplus-dma-channel". This conflicts with the sound drivers for the MPC8610 HPCD. On this board, the SSI uses two DMA channels and therefore those channels are not available for general purpose use. We change the compatible properties for these channels "fsl,ssi-dma-channel". This works because the sound drivers don't actually check the compatible property when it grabs channels. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
The RTC is sitting on the I2C1 bus at address 0x68. RTC interrupt signal is connected to the IPIC's EXT3 interrupt line. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 John Rigby 提交于
Uses mpc83xx_add_bridge in fsl_pci.c Adds second register tuple to pci node register property as done for 83xx device trees in a previous patch. Signed-off-by: NJohn Rigby <jrigby@freescale.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 John Rigby 提交于
Modify mpc83xx_add_bridge to get config space register base address from the device tree instead of immr + hardcoded offset. 83xx pci nodes have this change: register properties now contain two address length tuples: First is the pci bridge register base, this has always been there. Second is the config base, this is new. This is documented in dts-bindings/fsl/83xx-512x-pci.txt The changes accomplish these things: mpc83xx_add_bridge no longer needs to call get_immrbase it uses hard coded addresses if the second register value is missing Signed-off-by: NJohn Rigby <jrigby@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Martyn Welch 提交于
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). A number of MPC8641D based route interrupts for on-board interrupts through a FPGA based interrupt controller, which is chained with the MPC8641D's mpic. This patch provides a basic driver to allow basic routing of interrupts to the mpic. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Add interrupt info to the MPC8536DS .dts for the RTC Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 10 10月, 2008 1 次提交
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由 Paul Mackerras 提交于
Commit 9b09c6d9 ("powerpc: Change the default link address for pSeries zImage kernels") changed the real-base value in the CHRP note added by the addnote program from 12MB to 32MB to give more space for Open Firmware to load the zImage. (The real-base value says where we want OF to position itself in memory.) However, this change was ineffective on most pSeries machines, because the RPA note added by addnote has the "ignore me" flag set to 1. This was intended to tell OF to ignore just the RPA note, but has the side effect of also making OF ignore the CHRP note (at least on most pSeries machines). To solve this we have to set the "ignore me" flag to 0 in the RPA note. (We can't just omit the RPA note because that is equivalent to having an RPA note with default values, and the default values are not what we want.) However, then we have to make sure the values in the zImage's RPA note match up with the values that the kernel supplies later in prom_init.c with either the ibm,client-architecture-support call or the process-elf-header call in prom_send_capabilities(). So this sets the "ignore me" flag in the RPA note in addnote to 0, and adjusts the RPA note values in addnote.c and in prom_init.c to be consistent with each other and with the values in ibm_architecture_vec. However, since the wrapper is independent of the kernel, this doesn't ensure that the notes will stay consistent. To ensure that, this adds code to addnote.c so that it can extract the kernel's RPA note from the kernel binary and put that in the zImage. To that end, we put the kernel's fake ELF header (which contains the kernel's RPA note) into its own section, and arrange for wrapper to pull out that section with objcopy and pass it to addnote, which then extracts the RPA note from it and transfers it to the zImage. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 03 10月, 2008 1 次提交
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由 Victor Gallardo 提交于
Basic functionality for the AMCC Arches eval Board. Signed-off-by: NVictor Gallardo <vgallardo@amcc.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 30 9月, 2008 1 次提交
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由 David Gibson 提交于
The PCI bridge on the Holly board is incorrectly represented in the device tree. The current device tree node for the PCI bridge sits under the tsi-bridge node. That's not obviously wrong, but the PCI bridge translates some PCI spaces into CPU address ranges which were not translated by the "ranges" property in tsi-bridge node. We used to get away with this problem because the PCI bridge discovery code was also buggy, assuming incorrectly that PCI host bridge nodes were always directly under the root bus and treating the translated addresses as raw CPU addresses, rather than parent bus addresses. This has since been fixed, thus breaking Holly. This could be fixed by adding extra translations to the tsi-bridge node, but this patch instead moves the Holly PCI bridge out of the tsi-bridge node to the root bus. This makes the tsi-bridge node represent only the built-in IO devices in the bridge, with a more-or-less contiguous address range. This is the same convention used on Freescale SoC chips, where the "soc" node represents only the IMMR region, and the PCI and other bus bridges are separate nodes under the root bus. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 9月, 2008 1 次提交
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 18 9月, 2008 2 次提交
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由 Timur Tabi 提交于
Add the fsl,playback-dma and fsl,capture-dma properties to the Freescale MPC8610 HPCD device tree. These properties connect the SSI nodes to the DMA nodes for the DMA channels that the SSI should use. Also update the ssi.txt documentation. These properties will be needed when the ASoC V2 version of the Freescale MPC8610 device drivers are merged into the mainline. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Josh Boyer 提交于
One of the changes in the bootwrapper makefile introduced the dtbImage targets for boards that need a simple zImage with a DTB embedded in them (595be948, "[POWERPC] bootwrapper: Build multiple cuImages"). When this was done, it broke booting on the Holly board as the zImage.holly wrapper did not get the DTB embedded properly. This changes the target for the Holly board to a dtbImage so that the wrapper includes the vmlinux, wrapper bits, and DTB. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 17 9月, 2008 1 次提交
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由 Timur Tabi 提交于
For Freescale 8xxx devices that use an MPIC, the interrupt numbers in the device tree must be 16 greater than the values documented in the reference manual. In these chips, the MPIC is wired to use the first 16 numbers for external interrupts, but the documentation numbers internal interrupts from 0. In the MPC8610 HPCD device tree, the interrupt properties for the DMA channels for DMA2 were not the adjusted values. This fixes that. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 16 9月, 2008 1 次提交
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由 Martyn Welch 提交于
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the basic board support for GE Fanuc's SBC610, a 6U single board computer, based on Freescale's MPC8641D. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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