Commit 4c94c8b5 "ARM: tegra: update device trees for USB binding rework"
added regulator definitions for GPIO-controlled USB VBUS. However, none
of these contained the essential DT property enable-active-high. Add
this so that the regulator definitions are correct.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This updates multi_v7_defconfig to boot on at least Tegra2 Seaboard and
Panda ES. I lack working hardware for most of the platforms that were
enabled to compare with, so I could only verify those two for now. Still,
I enabled all of the available ones for build coverage purposes.

Beyond base platforms, things like PRINTK_TIME, filesystems, MMC, USB,
INET and UNIX networking was enabled. I'm sure we'll keep adding more
over time, but this gets us off the ground for semi-regular boot testing.
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Fix GIO3 base addresses for EMEV2.

This bug was introduced by 088efd92
("mach-shmobile: Emma Mobile EV2 GPIO support V3") which was included in v3.5.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Cc: stable@vger.kernel.org

Fix base address and IRQ resources associated with SCIFB0.

This bug was introduced by e481a528
("ARM: shmobile: r8a73a4 SCIF support V3") which was included in v3.10.
Signed-off-by: NTakanari Hayama <taki@igel.co.jp>
Acked-by: NMagnus Damm <damm@opensource.se>
[ horms+renesas@verge.net.au: Add information about commit and version
  this bug was added in ]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Cc: stable@vger.kernel.org

Due to recent changes and expecations of proper cpu bindings, there are
now cases for many of the in-tree devicetrees where a WARN() will hit
on boot due to badly formatted /cpus nodes.

Downgrade this to a pr_warn() to be less alarmist, since it's not a
new problem.

Tested on Arndale, Cubox, Seaboard and Panda ES. Panda hits the WARN
without this, the others do not.
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

This makes the l2x0 initialization fail gracefully on non-ux500
systems.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Instead of relying on the hard-coded mem/premem bases for
the PCI side, read in these from the device tree in the
DT probe path. Hard-code the old values on the non-DT probe
path. Introduce some static locals to hold these addresses
instead of the earlier static #defines.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This alters the local side address of the iospace to zero,
non prefetchable memory local side address to 0x00000000 and
prefetchable memory local side address to 0x10000000,
so as to match the values actually poked in by the driver.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

function-mask DT property is now a mask for a pin at each pin offset
inside a given pincontrol register. Fix DA850 DT data to reflect
this change.
Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com>
[nsekhar@ti.com: reword commit message for clarity]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

This patch adds pcie controller node for exynos5440-ssdk5440,
and also adds a phandle for pin controller node.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable PCIe support for Exynos5440 which has two PCIe controllers.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

We are using this function, now that we have introduced
the support for UTMI clock for computing the USB host rate.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NBo Shen <voice.shen@atmel.com>

at91sam9n12 has Full-speed only USB. So we should add
it to the list in at91_pllb_usbfs_clock_init() function.
Moreover, at91sam9n12 has an unusual PMC in the sense that it
has a PLLB but also has a USB clock register.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NBo Shen <voice.shen@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NBo Shen <voice.shen@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NWenyou Yang <wenyou.yang@atmel.com>

In previous version of SPI driver we where using different compatibility stings
for finding SPI features. We are now using the IP revision information.
So we stay with the unique compatibility string for this driver:
"atmel,at91rm9200-spi".
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NWenyou Yang <wenyou.yang@atmel.com>

commit 20d49e9c
(ARM: OMAP5: voltagedomain data: Add OMAP5 voltage domain data)

Introduced dummy volt data for OMAP5 with OMAP4460 voltage information.

However with the fixes introduced in later patches

commit cd8abed1
(ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm
 associated to a pwrdm)

We are no longer restricted in that respect. Further, OPP voltage
information is supposed to be provided by dts information. This needs
to be added in future patches as various voltage modules are converted
to dts.

This also fixes the build breakage for voltagedomains54xx_data.c when just
OMAP5 SoC is enabled: https://patchwork.kernel.org/patch/2764191/Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NNishanth Menon <nm@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NKevin Hilman <khilman@linaro.org>

B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM  with
standard set-top box IPs.

This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

B2000 board is reference board for STIH415/416 SOCs, it has
2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM.

This patch add initial support to b2000 with STiH415/416 with UART2 as
console and a heard beat LED.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch adds low level debug uart support to sti based SOCs.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

tegra_pmc_parse_dt() references __initconst data. Fix it to be __init.
This matches its only usage; a call from tegra_pmc_init() which is
already __init. This fixes:

WARNING: vmlinux.o(.text.unlikely+0x580): Section mismatch in reference
from the function tegra_pmc_parse_dt() to the (unknown reference)
.init.rodata:(unknown)
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Move the existing clock code in mach-msm to the common clock
framework. We lose our capability to set the rate of and enable a
clock through debugfs. This is ok though because the debugfs
features are mainly used for testing and development of new clock
code.

To maintain compatibility with the original MSM clock code we
make a wrapper for clk_reset() that calls the struct msm_clk
specific reset function. This is necessary for the usb and sdcc
devices on MSM until a better suited API is made available.

Cc: Saravana Kannan <skannan@codeaurora.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

To move closer to the generic struct clock framework move the
proc_comm based clock code to a platform driver. The data
describing the struct clks still live in the devices-$ARCH file,
but the clock initialization is done at driver binding time.

Cc: Saravana Kannan <skannan@codeaurora.org>
Reviewed-by: NPankaj Jangra <jangra.pankaj9@gmail.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

In the near future we'll be moving clock-pcom to a platform
driver, in which case these two users of clk_get() in mach-msm
need to be updated. Have board-trout-panel.c make the proc_comm
call directly so that we don't have to port this board specific
code to the driver right now and reorder the initcall order of
dma.c so that it initializes after the clock driver probes but
before any drivers use dma APIs.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

This file is not used outside of the two users in the clock-7x30
array. Those two clocks are virtual "source" clocks that don't
really need to exist outside of the clock driver. Let's remove
them from the array, since they're not doing anything anyway, and
then remove the clock-7x30.h include file along with it.

Cc: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

There are no users of this API anymore so let's just remove it.
If a need arises in the future we can extend the common clock API
to handle it.
Acked-by: NSaravana Kannan <skannan@codeaurora.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Nobody is using this API upstream and it's just contributing
cruft. Remove it so the MSM clock API is closer to the generic
struct clock API.
Acked-by: NSaravana Kannan <skannan@codeaurora.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Because of inline asm usage in platsmp.c, smc instruction
creates build failure for ARM V6+V7 build where as using instruction
encoding for smc breaks the thumb2 build.

So move the code snippet to separate asm file and mark
it with 'armv7-a$(plus_sec)' to avoid any build issues.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

With the new default platform code, we can always boot using DT
without requiring a board file, but we cannot build a kernel
unless we select at least one CPU core, which breaks some
"randconfig" builds.

This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we
always default to a common CPU core if no platform was enabled
that picks something else. The default we pick for ARMv4T is
ARM920T, while for ARMv5 we pick ARM926T.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This is required for building a kernel that enables only
IMX6SL but not IMX6Q, which would get a build error when
syscon is not available.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

Selecting this symbol causes a build warning without SMP:

warning: (ARCH_KEYSTONE) selects ARM_ERRATA_798181 which has unmet direct dependencies (CPU_V7 && SMP)
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

This is required for building a kernel that enables only
scb9328 and would not get the i.MX1 specific files
otherwise.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NSascha Hauer <kernel@pengutronix.de>