- 06 8月, 2013 7 次提交
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由 Jacek Anaszewski 提交于
This patch adds AK8975 magnetometer node and corresponding i2c-gpio bus node for TRATS2 board. Signed-off-by: NJacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
Add common camera node and Exynos4212/4412 specific nodes for FIMC, MIPI-CSIS, FIMC-LITE and FIMC-IS devices. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
This patch adds common Exynos4 SoC series FIMC and MIPI CSIS device nodes. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
The Exynos4 SPI controller has migrated to the generic DMA bindings since commit b5be04d3("spi: s3c64xx: Modify SPI driver to use generic DMA DT support"). Use the generic bindings to specify the corresponding DMA to make the SPI usable again on Exynos4x12 SoCs. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
The ISP power domain is a common power domain for FIMC-LITE and FIMC-IS (camera ISP) devices. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
Add pinctrl nodes for the ISP I2C0, ISP I2C1 and ISP UART devices. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sylwester Nawrocki 提交于
Add separate nodes for the CAMCLK pin and turn off pull-up on camera ports A, B. The video bus pins and the clock output (CAMCLK) pin need separate nodes since full camera port is not used in some configurations, e.g. for MIPI CSI-2 bus only CAMCLK is required and data/clock signal use separate dedicated pins. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 31 7月, 2013 1 次提交
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由 Sachin Kamat 提交于
Adds G2D node to exynos5250 DT file. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 24 7月, 2013 7 次提交
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由 Amit Daniel Kachhap 提交于
This patch adds device node for TMU controller. There are 3 instances of the controllers so 3 nodes are created. Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com> Reviewed-by: NEduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
This patch introduces device tree sources for Samsung Trats 2 board based on Exynos4412 SoC. Currently support includes: - eMMC, - main PMIC (max77686), - serial ports, - GPIO keys, - touchscreen. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
Re-ordering in alphabetical. Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Mark Brown 提交于
The default audio module for the Arndale has a WM1811A on it. Add this to the device tree bindings. Signed-off-by: NMark Brown <broonie@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Mark Brown 提交于
As part of this add nodes for the main wall supply as well as bucks 7 and 8 which are used to drop that down for several of the LDOs. Signed-off-by: NMark Brown <broonie@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Mark Brown 提交于
Fixed voltage regulators (and other similar free standing things) are supposed to go on a simple-bus for DT correctness reasons. Signed-off-by: NMark Brown <broonie@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Mark Brown 提交于
The out of tree code configures a pullup on the line indicating that it is an active low interrupt. Signed-off-by: NMark Brown <broonie@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 10 7月, 2013 1 次提交
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由 Kyungsik Lee 提交于
Integrates the LZ4 decompression code to the arm pre-boot code. Signed-off-by: NKyungsik Lee <kyungsik.lee@lge.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Borislav Petkov <bp@alien8.de> Cc: Florian Fainelli <florian@openwrt.org> Cc: Yann Collet <yann.collet.73@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 04 7月, 2013 1 次提交
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由 Xianglong Du 提交于
On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider (RTC_DIV) that divides the input 32.768KHz clock to the frequency that users need (E.g. 1 Hz). The divided real-time clock will be used to drive a 32-bit counter (RTC_COUNTER) that provides users with the actual time. In each cycle of the divided real-time clock, there is a Hertz interrupt generated to the RISC. Users can also configure an alarm (RTC_ALARM). When RTC_COUNTER matches the alarm, there will be an alarm interrupt generated to the RISC. The system RTC can generate an alarm wake-up signal to notify the power controller to wake up from power saving mode. Signed-off-by: NXianglong Du <Xianglong.Du@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Jingoo Han <jg1.han@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 7月, 2013 1 次提交
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由 Stephen Warren 提交于
Commit 4c94c8b5 "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 6月, 2013 2 次提交
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由 Rahul Sharma 提交于
This patch renames the combatible strings for hdmi, mixer, ddc and hdmiphy. It follows the convention of using compatible string which represent the SoC in which the IP was added for the first time. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Geert Uytterhoeven 提交于
Several drivers need font support independent of CONFIG_VT, cfr. commit 9cbce8d7e1dae0744ca4f68d62aa7de18196b6f4, "console/font: Refactor font support code selection logic"). Hence move the fonts and their support logic from drivers/video/console/ to its own library directory lib/fonts/. This also allows to limit processing of drivers/video/console/Makefile to CONFIG_VT=y again. [Kevin Hilman <khilman@linaro.org>: Update arch/arm/boot/compressed/Makefile] Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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- 27 6月, 2013 5 次提交
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由 Fabio Estevam 提交于
Instead of using a GPIO to turn on/off the CAN transceiver, it is better to use a regulator as some systems may use a PMIC to power the CAN transceiver. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
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由 Linus Walleij 提交于
This alters the local side address of the iospace to zero, non prefetchable memory local side address to 0x00000000 and prefetchable memory local side address to 0x10000000, so as to match the values actually poked in by the driver. Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Manjunathappa, Prakash 提交于
function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Jingoo Han 提交于
This patch adds pcie controller node for exynos5440-ssdk5440, and also adds a phandle for pin controller node. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Jingoo Han 提交于
Exynos5440 has two PCIe controllers which can be used as root complex for PCIe interface. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 26 6月, 2013 9 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Nicolas Ferre 提交于
In previous version of SPI driver we where using different compatibility stings for finding SPI features. We are now using the IP revision information. So we stay with the unique compatibility string for this driver: "atmel,at91rm9200-spi". Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Srinivas Kandagatla 提交于
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with standard set-top box IPs. This patch adds initial support to B2020 with STiH415/416 with SBC_UART1 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
B2000 board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM. This patch add initial support to b2000 with STiH415/416 with UART2 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 24 6月, 2013 2 次提交
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由 Marc Zyngier 提交于
arm26 support in Linux is long gone, yet it left an interresting, fossilized trace in the decompressor. Remove it so people won't get confused about what teqp is actually doing here... Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ezequiel Garcia 提交于
The length of the registers area for the Marvell 370/XP Ethernet controller was incorrect in the .dtsi: 0x2500, while it should have been 0x4000. This problem wasn't noticed because there used to be a static mapping for all the MMIO register region set up by ->map_io(). The register length was fixed in all the other device tree files, except from the armada-xp-mv78260.dtsi, in the following commit: commit cf8088c5 Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Date: Tue May 21 12:33:27 2013 +0200 arm: mvebu: fix length of Ethernet registers area in .dtsi This commit fixes a kernel panic in mvneta_probe(), when the kernel tries to access the unmapped registers: [ 163.639092] mvneta d0070000.ethernet eth0: mac: 6e:3c:4f:87:17:2e [ 163.646962] mvneta d0074000.ethernet eth1: mac: 6a:04:4e:6f:f5:ef [ 163.654853] mvneta d0030000.ethernet eth2: mac: 2a:99:19:19:fc:4c [ 163.661258] Unable to handle kernel paging request at virtual address f011bcf0 [ 163.668523] pgd = c0004000 [ 163.671237] [f011bcf0] *pgd=2f006811, *pte=00000000, *ppte=00000000 [ 163.677565] Internal error: Oops: 807 [#1] SMP ARM [ 163.682370] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc6-01850-gba0682e #11 [ 163.690046] task: ef04c000 ti: ef03e000 task.ti: ef03e000 [ 163.695467] PC is at mvneta_probe+0x34c/0xabc [...] Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 22 6月, 2013 1 次提交
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由 Daniel Tang 提交于
This patch adds device trees for describing the TI-Nspire hardware. Changes between v1 and v2: * Change "keymap" binding to the standard "linux,keymap" binding. Signed-off-by: NDaniel Tang <dt.tangr@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 6月, 2013 3 次提交
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由 Ezequiel Garcia 提交于
Although the internal register window size is 1 MiB, the previous ranges translation for the internal register space had a size of 0x4000000. This was done to allow the crypto and nand node to access the corresponding 'sram' and 'nand' decoding windows. In order to describe the hardware more accurately, we declare the real 1 MiB internal register space in the ranges, and add a translation entry for the nand node to access the 'nand' window. This commit will make future improvements on the MBus DT binding easier. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Lee Jones 提交于
When this node was added, the AB8500 GPIO driver was pretty broken. As a hack, we pretended that NOMADIK GPIO 26 was the correct on/off pin, as it was unused. It worked because AB8500 GPIO 26 was in an 'always on from boot' state. Now the AB8500 GPIO driver is working, the default state for all the pins is 'off'. Let's flip back over to use the correct GPIO which is _actually_ attached to the regulator. We're also taking the opportunity to straighten out some formatting misdemeanours, swapping spaces for tabs. Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Lee Jones 提交于
Here we're adding a node for the AB8500 GPIO device. This will allow other DT:ed components to obtain GPIOs for use within their drivers. Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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