1. 03 1月, 2011 1 次提交
  2. 16 7月, 2010 1 次提交
  3. 23 11月, 2009 1 次提交
  4. 16 3月, 2009 1 次提交
    • N
      [ARM] make page_to_dma() highmem aware · 58edb515
      Nicolas Pitre 提交于
      If a machine class has a custom __virt_to_bus() implementation then it
      must provide a __arch_page_to_dma() implementation as well which is
      _not_ based on page_address() to support highmem.
      
      This patch fixes existing __arch_page_to_dma() and provide a default
      implementation otherwise.  The default implementation for highmem is
      based on __pfn_to_bus() which is defined only when no custom
      __virt_to_bus() is provided by the machine class.
      
      That leaves only ebsa110 and footbridge which cannot support highmem
      until they provide their own __arch_page_to_dma() implementation.
      But highmem support on those legacy platforms with limited memory is
      certainly not a priority.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      58edb515
  5. 28 11月, 2008 1 次提交
    • N
      [ARM] remove a common set of __virt_to_bus definitions · b5ee9002
      Nicolas Pitre 提交于
      Let's provide an overridable default instead of having every machine
      class define __virt_to_bus and __bus_to_virt to the same thing.  What
      most platforms are using is bus_addr == phys_addr so such is the default.
      
      One exception is ebsa110 which has no DMA what so ever, so the actual
      definition is not important except only for proper compilation.  Also
      added a comment about the special footbridge bus translation.
      
      Let's also remove comments alluding to set_dma_addr which is not
      (and should not) be commonly used.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b5ee9002
  6. 18 9月, 2008 1 次提交
  7. 01 9月, 2008 1 次提交
  8. 07 8月, 2008 1 次提交
  9. 08 12月, 2006 1 次提交
    • D
      [ARM] 3995/1: iop13xx: add iop13xx support · 285f5fa7
      Dan Williams 提交于
      The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a
      Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory
      controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz
      PCI-X interface, a x8 PCI-Express interface, and other peripherals to form
      a system-on-a-chip RAID subsystem engine.
      
      The iop342 processor replaces the SAS controller with a second Xscale core
      for dual core embedded applications.
      
      The iop341 processor is the single core version of iop342.
      
      This patch supports the two Intel customer reference platforms iq81340mc
      for external storage and iq81340sc for direct attach (HBA) development.
      
      The developer's manual is available here:
      ftp://download.intel.com/design/iio/docs/31503701.pdf
      
      Changelog:
      * removed virtual addresses from resource definitions
      * cleaned up some unnecessary #include's
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      285f5fa7