CAVIUM_OCTEON_SOC most place we used to use CPU_CAVIUM_OCTEON.  This
allows us to CPU_CAVIUM_OCTEON in places where we have no OCTEON SOC.

Remove CAVIUM_OCTEON_SIMULATOR as it doesn't really do anything, we can
get the same configuration with CAVIUM_OCTEON_SOC.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-ide@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Cc: linux-i2c@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: spi-devel-general@lists.sourceforge.net
Cc: devel@driverdev.osuosl.org
Cc: linux-usb@vger.kernel.org
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com>
Patchwork: https://patchwork.linux-mips.org/patch/5295/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
Signed-off-by: NSilviu-Mihai Popescu <silviupopescu1990@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4986/Acked-by: NJohn Crispin <blogic@openwrt.org>

The PCIe controller is almost the same as the BCM6328 one, with only
the SERDES register being at a different location.
Signed-off-by: NJonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5011/Acked-by: NJohn Crispin <blogic@openwrt.org>

Cc: stable@vger.kernel.org
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Don't use create_proc_read_entry() as that is deprecated, but rather use
proc_create_data() and seq_file instead.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

The of_node field of the device assigned to a
PCI bus is used during scanning of the PCI bus.
However on MIPS, the of_node field is assigned
only after the bus has been scanned.

Implement the architecture specific version of
'pcibios_get_phb_of_node'. Which ensures that the
PCI driver core will initialize the of_node field
before starting the scan.

Also remove the local assignment of bus->dev.of_node,
it is not needed after the patch.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Commit 7517de34 ("MIPS: Alchemy: Redo
PCI as platform driver") added a reference to CONFIG_DEBUG_PCI. Change
it to CONFIG_PCI_DEBUG, as that is a valid Kconfig macro.

Also add a newline to a debugging printk that this fix enables.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4928/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4927/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4926/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.

Add code to initialize the command register
from the Linux code to avoid this.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Change to the code to use per-controller IRQ base.
This is needed for multiple PCI controller support.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4915/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The current code uses static variables to store the
PCI controller specific data. This works if the system
contains one PCI controller only, however it becomes
impractical when multiple PCI controllers are present.

Move the variables into a dynamically allocated controller
specific structure, and use that instead of the static
variables.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4912/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The IO and memory resources of a PCI controller
might already have a parent resource set when
they are passed to 'register_pci_controller'.

If the parent resource is set, the request_resource
call will fail due to resource conflict and the
current code will not be able to register the
PCI controller.

Use the parent resource if it is available in the
request_resource call to avoid the isssue.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4910/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The functions are unused now, so remove them.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The constants will be used by a subsequent patch.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4907/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The patch converts the pci-ar71xx driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4906/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The patch converts the pci-ar724x driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4905/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

On a multi-chip XLP board, each node can have 4 PCIe links. Update
XLP PCI code to initialize PCIe on all the nodes.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4803/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Reading PCI extended register at 0x255 on a bridge will hang if there
is no device connected on the link. Make PCI read routine skip this
register.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4789/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Rename function xlp_enable_pci_bswap() to xlp_config_pci_bswap(), which
is a better description for its functionality.  When compiled in
big-endian mode, xlp_config_pci_bswap() will configure the PCIe links
to byteswap.  In little-endian mode, no swap configuration is needed
for the PCIe controller, and the function is empty.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4802/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

We need to make sure that the reset gpio is available and also set a sane
default state.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4817/

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The base address of the PCI memory is 0x10000000 and the base address of the
PCI configuration space is 0x17000000 on the AR71xx SoCs.

The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that
overlaps with the configuration space.  This patch fixes the value of the
AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4873/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The base address of the PCI memory is
0x10000000 and the base address of the
PCI configuration space is 0x14000000
on the AR724x SoCs.

The AR724X_PCI_MEM_SIZE is defined as
0x08000000 which is wrong because that
overlaps  with the configuration space.

The patch fixes the value of the
AR724X_PCI_MEM_SIZE constant, in order
to avoid this resource conflicts.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4872/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
markings need to be removed.

This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.

Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.

Cc: Bill Pemberton <wfp5p@virginia.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Nobody seems to be interested anymore and upstream also never had an
ethernet driver.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

I had no idea just how broken IOC3 was until I read this.
Signed-off-by: NDave Jones <davej@redhat.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some initialization errors are reported with the existing OCTEON EDAC
support patch.  Also some parts have more than one memory controller.

Fix the errors and add multiple controllers if present.
Signed-off-by: NDavid Daney <david.daney@cavium.com>

Drivers for EDAC on Cavium.  Supported subsystems are:

 o CPU primary caches.  These are parity protected only, so only error
   reporting.
 o Second level cache - ECC protected, provides SECDED.
 o Memory: ECC / SECDEC if used with suitable DRAM modules.  The driver will
   will only initialize if ECC is enabled on a system so is safe to run on
   non-ECC memory.
 o PCI: Parity error reporting

Since it is very hard to test this sort of code the implementation is very
conservative and uses polling where possible for now.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Reviewed-by: NBorislav Petkov <borislav.petkov@amd.com>

Remove conditional code based on CONFIG_HOTPLUG being false.  It's
always on now in preparation of it going away as an option.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Use the nlm_set_pic_extra_ack() call to setup the extra interrupt
ACK needed by XLR PCI and XLS PCIe. Simplify the code by adding
nlm_pci_link_to_irq().
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4561Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Use the new reset helper where appropriate.
Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4453Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Add a PCIe clock and use that instead of directly touching the clock
control register. While at it, fail if there is no such clock.
Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4452Signed-off-by: NJohn Crispin <blogic@openwrt.org>

  LD      arch/mips/pci/built-in.o
WARNING: arch/mips/pci/built-in.o(.devinit.text+0x2a0): Section mismatch in reference from the function malta_piix_func0_fixup() to the variable .init.data:pci_irq
The function __devinit malta_piix_func0_fixup() references
a variable __initdata pci_irq.
If pci_irq is only used by malta_piix_func0_fixup then
annotate pci_irq with a matching annotation.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NAndi Kleen <ak@linux.intel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Most architectures implement this in exactly the same way. Instead of
having each architecture duplicate this function, provide a single
implementation in the core and make it a weak symbol so that it can be
overridden on architectures where it is required.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>